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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.76
STH (Store Half-word Data in Register to Memory)
Stores the half-word data in "Ri" to memory address "Rj".
■
STH (Store Half-word Data in Register to Memory)
Assembler format:
STH Ri, @Rj
Operation:
Ri
→
(Rj)
Flag change:
N, Z, V, and C: Unchanged
Execution cycles:
a cycle(s)
Instruction format:
Example:
STH R3, @R2
N
Z
V
C
–
–
–
–
MSB
LSB
0
0
0
1
0
1
0
1
Rj
Ri
R2
12345678
1 2 3 4
5 6 7 8
0 0 0 0
4 3 2 1
R2
R3
R3
0 0 0 0
4 3 2 1
1 2 3 4
5 6 7 8
12345678
4 3 2 1
x x x x
Memory
Memory
Before execution
After execution
Instruction bit pattern : 0001 0101 0010 0011