Справочник Пользователя для Motorola 700/800-Series
![Motorola](https://files.manualsbrain.com/attachments/83de88ba2280e7232128e8931d7cbd2a38dcc654/common/fit/150/50/0293f422c4d32e7e0f777d5e11bc33c83ea5627f71ddf155374c02a23d9a/brand_logo.png)
Memory Maps
1-29
1
I/O space must be marked cache inhibit and serialized in its page
table.
table.
further defines the map for the local
I/O devices.
Table 1-4. Local Bus Memory Map
Address Range
Devices
Accessed
Port
Width
Size
Software
Cache
Inhibit
Notes
Programmable
DRAM on parity
mezzanine
mezzanine
D32
4MB-16MB
N
2
Programmable
DRAM on ECC
mezzanine
mezzanine
D32
4MB-32MB
N
2
Programmable
Onboard SRAM
D32
128KB
N
2
Programmable
VMEbus
A32/A24
A32/A24
D32-D16
--
?
4
Programmable
IP_a memory
D32-D8
64KB-8MB
?
2, 4
Programmable
IP_b memory
D32-D8
64KB-8MB
?
2, 4
$FF800000-$FF9FFFFF
Flash/EPROM
D32
2MB
N
1, 5
$FFA00000-$FFBFFFFF
EPROM/Flash
D32
2MB
N
5
$FFC00000-$FFDFFFFF
Not decoded
D32
2MB
N
$FFE00000-$FFE1FFFF
Onboard SRAM
default
default
D32
128KB
N