Справочник Пользователя для Infineon DDR3 2GB Memory Module IMSH2GU13A1F1C-10F

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IMSH2GU13A1F1C-10F
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IMSH[1G/2G][U/E]x3A1F1C(T)
DDR3 Unbuffered DIMM
Advance Internet Data Sheet
Rev. 0.65, 2008-12
32
03052008-R2G5-2FN2
TABLE 24
SPD Codes for IMSH2GU13A1F1C
Product Type
IMSH2GU13A
1F1
C
–10
F
IMSH2GU13A
1F1
C
–10
G
IMSH2GU13A
1F1
C
–13
G
IMSH2GU13A
1F1
C
–13
H
Organization
2 GByte
2 GByte
2 GByte
2 GByte
×64
×64
×64
×64
2 Ranks (
×8) 2 Ranks (×8) 2 Ranks (×8) 2 Ranks 
(
×8)
Label Code
PC3–
8500U–7
PC3–
8500U–8
PC3–
10600U–8
PC3–
10600U–9
JEDEC SPD Revision
Rev. 1.0
Rev. 1.0
Rev. 1.0
Rev. 1.0
Byte#
Description
HEX
HEX
HEX
HEX
0
# of SPD bytes utilized / # of bytes in SPD / CRC
92
92
92
92
1
SPD Revision
10
10
10
10
2
SDRAM technology key byte
0B
0B
0B
0B
3
DIMM module type
02
02
02
02
4
SDRAM density and banks
02
02
02
02
5
SDRAM addressing
11
11
11
11
6
Module physical attributes
00
00
00
00
7
Module organization
09
09
09
09
8
Module memory bus width
03
03
03
03
9
Fine time base (FTB) dividend and divisor
52
52
52
52
10
Medium time base (MTB) dividend
01
01
01
01
11
Medium time base (MTB) divisor
08
08
08
08
12
Minimum SDRAM cycle time (
t
CK.MIN
)
0F
0F
0C
0C
13
Reserved
00
00
00
00
14
CAS Latencies Supported - LSB
1C
14
7E
7C
15
CAS Latencies Supported - MSB
00
00
00
00
16
Minimum CAS Latency Time
 (t
CK.MIN
)
69
78
60
69
17
Minimum Write Recovery Time
 (t
WR.MIN
)
78
78
78
78
18
Minimum RAS# toCAS# Delay Time
 (t
RCD.MIN
)
69
78
60
69
19
Minimum Row Active to Row Active Delay Time
 
(t
RRD.MIN
)
3C
3C
30
30
20
Minimum Row PrechargeTime
 (t
RP.MIN
)
69
78
60
69
21
Upper Nibbles fo
r t
RAS 
and 
t
RC
11
11
11
11