Техническая Спецификация для Intel E5300 BX80571E5300

82

Datasheet

wide range (2 Kbps to 2 Mbps). The PECI interface on the processor is disabled by 

default and must be enabled through BIOS. More information can be found in the 

Platform Environment Control Interface (PECI) Specification. 

Fan speed control solutions based on PECI utilize a T

CONTROL

 value stored in the 

processor IA32_TEMPERATURE_TARGET MSR. The T

CONTROL

 MSR uses the same offset 

temperature format as PECI though it contains no sign bit. Thermal management 

devices should infer the T

CONTROL

 value as negative. Thermal management algorithms 

should utilize the relative temperature value delivered over PECI in conjunction with the 

T

CONTROL

 MSR value to control or optimize fan speeds. 

 shows a conceptual 

fan control diagram using PECI temperatures.

The relative temperature value reported over PECI represents the delta below the onset 

of thermal control circuit (TCC) activation as indicated by PROCHOT# assertions. As the 

temperature approaches TCC activation, the PECI value approaches zero. TCC activates 

at a PECI count of zero. 

The PECI register resides at address 30h. 

PECI command support is covered in detail in the Platform Environment Control 

Interface Specification. Refer to this document for details on supported PECI command 

function and codes.