Справочник Пользователя для Renesas R5S72622

 
Section 26   USB 2.0 Host/Function Module 

Page 1392 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

11 CTRT 

0 

R/W*

7

Control Transfer Stage Transition Interrupt Status*

4

*

6

 

0:  Control transfer stage transition interrupts not 

generated 

1:  Control transfer stage transition interrupts 

generated 

When the function controller function is selected, this 
module updates the CTSQ value and sets this bit to 
1 on detecting a change in the control transfer stage. 

When this interrupt is generated, clear the status 
before this module detects the next control transfer 
stage transition.  

When the host controller function is selected, the 
read value is invalid. 

10 

BEMP 

0 

R 

Buffer Empty Interrupt Status 

0: BEMP interrupts not generated 

1: BEMP interrupts generated 

This module sets this bit to 1 when at least one 
PIPEBEMP bit in BEMPSTS is set to 1 among the 
PIPEBEMP bits corresponding to the PIPEBEMPE 
bits in BEMPENB to which 1 has been set (when this 
module detects the BEMP interrupt status in at least 
one pipe among the pipes for which the BEMP 
interrupt output is enabled). 

For the conditions for PIPEBEMP status assertion, 
refer to section 26.4.2 (3), BEMP Interrupt. 

This module clears this bit to 0 when 0 is written to 
all the PIPEBEMP bits corresponding to the 
PIPEBEMPE bits to which 1 has been set.  

This bit cannot be cleared to 0 even if 0 is written to 
this bit.