Техническая Спецификация для Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333
Модели
P4X-UPE3210-316-6M1333
Datasheet
111
DRAM Controller Registers (D0:F0)
17:16
RW
00b
DRAM Refresh High Watermark (REFHIGHWM): When the refresh count
exceeds this level, a refresh request is launched to the scheduler and the
dref_high flag is set.
00 = 3
01 = 4
10 = 5
11 = 6
exceeds this level, a refresh request is launched to the scheduler and the
dref_high flag is set.
00 = 3
01 = 4
10 = 5
11 = 6
15:14
RW
00b
DRAM Refresh Low Watermark (REFLOWWM): When the refresh count
exceeds this level, a refresh request is launched to the scheduler and the
dref_low flag is set.
00 = 1
01 = 2
10 = 3
11 = 4
exceeds this level, a refresh request is launched to the scheduler and the
dref_low flag is set.
00 = 1
01 = 2
10 = 3
11 = 4
13:0
RW
00110000
110000b
Refresh Counter Time Out Value (REFTIMEOUT): Program this field with a
value that will provide 7.8 us at the memory clock frequency.
At various mclk frequencies, this results in the following values:
400 Mhz -> C30 hex (Default Value)
533 Mhz -> 104B hex
666 Mhz -> 1450 hex
value that will provide 7.8 us at the memory clock frequency.
At various mclk frequencies, this results in the following values:
400 Mhz -> C30 hex (Default Value)
533 Mhz -> 104B hex
666 Mhz -> 1450 hex
Bit
Access
Default
Value
Description