Техническая Спецификация для Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333

Datasheet

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•

Differential host clock of 200/266/333 MHz. Supports FSB transfer rates of 

800/1066/1333 MT/s.

• Differential memory clocks of 333/400/533 MHz. Supports memory 

transfer rates of DDR2-667 and DDR2-800.

•

The PCI Express* PLL of 100 MHz Serial Reference Clock generates the PCI 

Express core clock of 250 MHz

.

• All of the above clocks are capable of tolerating Spread Spectrum clocking.
•

Host, memory, and PCI Express PLLs are disabled until PWROK is asserted.

• MCH Power Management support includes: SMRAM space remapping to A0000h 

(128 KB)

• Supports extended SMRAM space above 256 MB, and cacheable (cacheability 

controlled by processor)

• ACPI Rev 1.0b compatible power management 
• Supports processor states: C0, C1, and C2
• Supports System states: S0, S1, and S5
• Supports processor Thermal Management 2 (TM2)
• Supports Manageability states M0, M1–S5, Moff–S5, Moff-M1

MCH Thermal Sensor support includes:

• Catastrophic Trip Point support for emergency clock gating for the MCH
• Hot Trip Point support for SMI generation