Техническая Спецификация для Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333

64

Datasheet

I/O Address:

0CFCh

Default Value:

00000000h

Access:

R/W

Size:

32 bits

CONFIG_DATA is a 32-bit read/write window into configuration space. The portion of 

configuration space that is referenced by CONFIG_DATA is determined by the contents 

of CONFIG_ADDRESS.

§

15:11

R/W

00h

Device Number: This field selects one agent on the PCI bus selected by 
the Bus Number. When the Bus Number field is “00” the MCH decodes the 
Device Number field. The MCH is always Device Number 0 for the Host 
bridge entity, Device Number 1 for the Host-PCI Express entity. 
Therefore, when the Bus Number =0 and the Device Number equals 0, 1, 
or 2 the internal MCH devices are selected. 
This field is mapped to byte 6 [7:3] of the request header format during 
PCI Express Configuration cycles and A [15:11] during the DMI 
configuration cycles.

10:8

R/W

000b

Function Number: This field allows the configuration registers of a 
particular function in a multi-function device to be accessed. The MCH 
ignores configuration cycles to its internal devices if the function number 
is not equal to 0 or 1. 
This field is mapped to byte 6 [2:0] of the request header format during 
PCI Express Configuration cycles and A[10:8] during the DMI 
configuration cycles.

7:2

R/W

00h

Register Number: This field selects one register within a particular Bus, 
Device, and Function as specified by the other fields in the Configuration 
Address Register. 
This field is mapped to byte 7 [7:2] of the request header format during 
PCI Express Configuration cycles and A[7:2] during the DMI 
Configuration cycles.

1:0

Reserved

31:0

R/W

0000 0000 h

Configuration Data Window (CDW): If bit 31 of CONFIG_ADDRESS 
is 1, any I/O access to the CONFIG_DATA register will produce a 
configuration transaction using the contents of CONFIG_ADDRESS to 
determine the bus, device, function, and offset of the register to be 
accessed.