Техническая Спецификация для Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333
Модели
P4X-UPE3210-316-6M1333
DRAM Controller Registers (D0:F0)
88
Datasheet
5.1.29
TOM—Top of Memory
B/D/F/Type:
0/0/0/PCI
Address Offset: A0–A1h
Default Value:
0001h
Access:
RO, RW/L
Size:
16 bits
This Register contains the size of physical memory. BIOS determines the memory size
reported to the OS using this Register.
5.1.30
TOUUD—Top of Upper Usable Dram
B/D/F/Type:
0/0/0/PCI
Address Offset: A2–A3h
Default Value:
0000h
Access:
RW/L
Size:
16 bits
This 16 bit register defines the Top of Upper Usable DRAM.
Configuration software must set this value to TOM minus all EP stolen memory if
reclaim is disabled. If reclaim is enabled, this value must be set to reclaim limit + 1byte
64 MB aligned since reclaim limit is 64 MB aligned. Address bits 19:0 are assumed to
be 000_0000h for the purposes of address comparison. The Host interface positively
decodes an address towards DRAM if the incoming address is less than the value
programmed in this register and greater than or equal to 4 GB.
These bits are Intel TXT lockable.
Bit
Access
Default
Value
Description
15:10
RO
00h
Reserved
9:0
RW/L
001h
Top of Memory (TOM): This register reflects the total amount of populated
physical memory. This is NOT necessarily the highest main memory address
(holes may exist in main memory address map due to addresses allocated for
memory mapped IO). These bits correspond to address bits 35:26 (64MB
granularity). Bits 25:0 are assumed to be 0. All the bits in this register are
locked in Intel TXT mode.
physical memory. This is NOT necessarily the highest main memory address
(holes may exist in main memory address map due to addresses allocated for
memory mapped IO). These bits correspond to address bits 35:26 (64MB
granularity). Bits 25:0 are assumed to be 0. All the bits in this register are
locked in Intel TXT mode.
Bit
Access
Default
Value
Description
15:0
RW/L
0000h
TOUUD (TOUUD): This register contains bits 35:20 of an address one byte
above the maximum DRAM memory above 4 GB that is usable by the operating
system. Configuration software must set this value to TOM minus all EP stolen
memory if reclaim is disabled. If reclaim is enabled, this value must be set to
reclaim limit 64 MB aligned since reclaim limit + 1byte is 64 MB aligned. Address
bits 19:0 are assumed to be 000_0000h for the purposes of address comparison.
The Host interface positively decodes an address towards DRAM if the incoming
address is less than the value programmed in this register and greater than
4 GB. All the Bits in this register are locked in Intel TXT mode.
above the maximum DRAM memory above 4 GB that is usable by the operating
system. Configuration software must set this value to TOM minus all EP stolen
memory if reclaim is disabled. If reclaim is enabled, this value must be set to
reclaim limit 64 MB aligned since reclaim limit + 1byte is 64 MB aligned. Address
bits 19:0 are assumed to be 000_0000h for the purposes of address comparison.
The Host interface positively decodes an address towards DRAM if the incoming
address is less than the value programmed in this register and greater than
4 GB. All the Bits in this register are locked in Intel TXT mode.