Справочник Пользователя для Renesas R5S72646
Section 26 USB 2.0 Host/Function Module
Page 1388 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
Bit Bit
Name
Initial
Value
Value
R/W Description
8
PIPE8BEMPE 0
R/W
BEMP Interrupt Enable for PIPE8
0: Interrupt output disabled
1: Interrupt output enabled
7
PIPE7BEMPE 0
R/W
BEMP Interrupt Enable for PIPE7
0: Interrupt output disabled
1: Interrupt output enabled
6
PIPE6BEMPE 0
R/W
BEMP Interrupt Enable for PIPE6
0: Interrupt output disabled
1: Interrupt output enabled
5
PIPE5BEMPE 0
R/W
BEMP Interrupt Enable for PIPE5
0: Interrupt output disabled
1: Interrupt output enabled
4
PIPE4BEMPE 0
R/W
BEMP Interrupt Enable for PIPE4
0: Interrupt output disabled
1: Interrupt output enabled
3
PIPE3BEMPE 0
R/W
BEMP Interrupt Enable for PIPE3
0: Interrupt output disabled
1: Interrupt output enabled
2
PIPE2BEMPE 0
R/W
BEMP Interrupt Enable for PIPE2
0: Interrupt output disabled
1: Interrupt output enabled
1
PIPE1BEMPE 0
R/W
BEMP Interrupt Enable for PIPE1
0: Interrupt output disabled
1: Interrupt output enabled
0
PIPE0BEMPE 0
R/W
BEMP Interrupt Enable for PIPE0
0: Interrupt output disabled
1: Interrupt output enabled
26.3.15
SOF Output Configuration Register (SOFCFG)
SOFCFG is a register that specifies the transaction-enabled time and BRDY interrupt status clear
timing.
timing.
This register is initialized by a power-on reset.