Руководство По Устранению Ошибки для Cisco Cisco ONS 15454 SONET Multiservice Provisioning Platform (MSPP)

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Understanding the Cisco ONS 15454 XC and
XC−VT Switching Matrix
Document ID: 13552
Contents
Introduction
 Prerequisites
      Requirements
      Components Used
      Conventions
 Background Information
 Line Card Capacities for VT1.5 Traffic
 Line Card Characteristics
      Table Notes
 Line Card Architecture
      XC Architecture
      XC−VT and XC10G Architecture
      Architecture Summary
VT 1.5 Bandwidth with BLSR, UPSR and Linear 1 + 1 Configurations
      BLSR
UPSR and Linear 1+1
Point−to−Multipoint Circuits
 Examples of Creating Circuits
      Correct Provisioning: Grooming VT1.5 Connections Over an STS−1 Circuit
      Incorrect Provisioning: Exceeding the VTX Bandwidth With VT1.5 Connections Over Multiple STS−1
Circuits
 Cross Connect Wallchart
 Related Information
Introduction
The Cisco Optical Networking System (ONS) 15454 provides a maximum switching capability of 336 Virtual
Tributary level 1.5 (VT1.5) circuits. This number may be unreachable if running Unidirectional Path Switched
Ring (UPSR) or Linear 1 + 1. As transverseing these architechures provides a lower maximum switching
capability of 224 VT1.5 circuits. This document explains how to provision (or groom) VT1.5 circuits to
achieve these values and demonstrates why users of the Cisco ONS 15454 may run out of available VT1.5
circuits before these maximum values are reached.
Note: The first VT connection on any port or card to any other port or card uses two Synchronous Transport
Signal level 1 (STS−1) ports on the VT Cross Connection (VTX) matrixone from the STS Cross Connection
(STSX) matrix to the VTX matrix and another from the VTX matrix back to the STSX matrix. If one of the
terminations for that circuit happens to be an optical line card, protected by UPSR or Linear 1+1, there is an
additional port burned from the VTX matrix to the STSX matrix. Once a port or card is connected to an
STS−1 port on the VTX matrix, up to 28 VT1.5 circuits can be connected without reducing any further
bandwidth (that is, without consuming additional STS−1 ports on the VTX matrix).