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Datasheet
51
Electrical Specifications
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies. 
These are pre-silicon estimates and are subject to change.
2.
3mA sink current.
3.
0.1 V
CCGIO 
< Vi < 0.9 V
CCGIO_MAX 
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies. 
These are pre-silicon estimates and are subject to change.
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies. 
These are pre-silicon estimates and are subject to change.
2.
All LVDS active lanes must be terminated with 100 Ohm resistor for correct V
OS
 
performance and measurement.
V
OL1
Output Low Voltage - 1
0
0.4
V
2
L
I
Input Leakage Current
-50
50
uA
3
C
I
Capacitance
--
10
pF
Table 4-38.CRT_DDC_DATA. CRT_DDC_CLK, LDDC_DATA, LDDC_CLK, LCTLA_CLK, and 
LCTLB_DATA DC Specification  (Sheet 2 of 2)
Symbol
Parameter
Standard mode 
100kbits/s
Units
Notes
1
Min
Max
Table 4-39.CRT_HSYNC and CRT_VSYNC DC Specification
Symbol
Parameter
Min
Typ
Max
Units
Notes
1
V
OH
Output High Voltage
2.4
--
V
CCGIO
V
V
OL
Output Low Voltage
0
--
0.5
V
I
OH
Output High Current
--
--
8
mA
I
OL
Output Low Current
--
--
8
mA
Table 4-40.LVDS Interface DC Specification (functional operating range, 
V
CCLVD
 = 1.8V ±5%)
Symbol
Parameter
Min
Typ
Max
Units
Notes
1
V
OD
Differential Output Voltage
250
350
450
mV
2
Δ
V
OD
Change in V
OD 
between 
Complementary Output States
50
mV
2
V
OS
Offset Voltage
1.125
1.25
1.375
V
2
Δ
V
OS
Change in V
OS 
between 
Complementary Output States
50
mV
2
I
OS
Output Short Circuit Current
-3.5
-10
mA
2
I
OZ
Output TRI-STATE Current
±1
±10
uA
2