Справочник Пользователя для Intel D425 AU80610006252AA
Модели
AU80610006252AA
Processor Configuration Registers
Datasheet
139
1.10.10 MMADR - Memory Mapped Range Address
B/D/F/Type: 0/2/1/PCI
Address Offset:
10-13h
Default Value:
00000000h
Access:
RW; RO;
Size: 32
bits
This register requests allocation for the IGD registers and instruction ports. The
allocation is for 512 KB and the base address is defined by bits [31:19].
allocation is for 512 KB and the base address is defined by bits [31:19].
Bit Access Default
Value
Description
31:19 RW 0000h
Memory Base Address (MBA):
Set by the OS, these bits correspond to
address signals [31:19].
Set by the OS, these bits correspond to
address signals [31:19].
18:4 RO 0000h
Address Mask (ADMSK):
Hardwired to 0s to indicate 512 KB address
range.
Hardwired to 0s to indicate 512 KB address
range.
3 RO 0b
Prefetchable Memory (PREFMEM):
Hardwired to 0 to prevent prefetching.
Hardwired to 0 to prevent prefetching.
2:1 RO 00b
Memory Type (MEMTYP):
Hardwired to 0s to indicate 32-bit address.
Hardwired to 0s to indicate 32-bit address.
0 RO 0b
Memory / IO Space (MIOS):
Hardwired to 0 to indicate memory space.
Hardwired to 0 to indicate memory space.
1.10.11 SVID2 - Subsystem Vendor Identification
B/D/F/Type: 0/2/1/PCI
Address Offset:
2C-2Dh
Default Value:
0000h
Access:
RO;
Size: 16
bits
Bit Access Default
Value
Description
15:0 RO 0000h
Subsystem Vendor ID (SUBVID):
This value is used to identify the vendor of the
subsystem. This register should be programmed
by BIOS during boot-up. Once written, this
register becomes Read_Only.
This register can only be cleared by a Reset.
This value is used to identify the vendor of the
subsystem. This register should be programmed
by BIOS during boot-up. Once written, this
register becomes Read_Only.
This register can only be cleared by a Reset.