Справочник Пользователя для Intel D425 AU80610006252AA
Модели
AU80610006252AA
Processor Configuration Registers
90
Datasheet
Bit Access Default
Value
RST/
PWR
Description
7:1 RW 00h Core
Traffic Class / Virtual Channel 1 Map
(TCVC1M):
Indicates the TCs (Traffic Classes) that are
mapped to the VC resource. Bit locations within
this field correspond to TC values. For
(TCVC1M):
Indicates the TCs (Traffic Classes) that are
mapped to the VC resource. Bit locations within
this field correspond to TC values. For
example, when bit 7 is set in this field, TC7 is
mapped to this VC resource. When more than
one bit in this field is set, it indicates that
multiple TCs are mapped to the VC resource. In
order to remove one or more TCs from the
TC/VC Map of an enabled VC, software must
ensure that no new or outstanding transactions
with the TC labels are targeted at the given
Link.
mapped to this VC resource. When more than
one bit in this field is set, it indicates that
multiple TCs are mapped to the VC resource. In
order to remove one or more TCs from the
TC/VC Map of an enabled VC, software must
ensure that no new or outstanding transactions
with the TC labels are targeted at the given
Link.
0 RO 0b Core
Traffic Class 0 / Virtual Channel 1 Map
(TC0VC1M):
Traffic Class 0 is always routed to VC0.
(TC0VC1M):
Traffic Class 0 is always routed to VC0.
1.7.10
DMIVC1RSTS - DMI VC1 Resource Status
B/D/F/Type: 0/0/0/DMIBAR
Address Offset:
26-27h
Default Value:
0002h
Access:
RO;
Size: 16
bits
Reports the Virtual Channel specific status.
Bit Access Default
Value
RST/
PWR
Description
15:2 RO 0000h Core
Reserved ():
1 RO 1b Core
Virtual Channel 1 Negotiation Pending
(VC1NP):
(VC1NP):
0: The VC negotiation is complete.
1:The VC resource is still in the process of
negotiation (initialization or disabling).
Software may use this bit when enabling or
disabling the VC. This bit indicates the status of
the process of Flow Control initialization. It is set
by default on Reset, as well as whenever the
corresponding Virtual Channel is Disabled or the
Link is in the DL_Down state. It is cleared when
the link successfully exits the FC_INIT2 state.
negotiation (initialization or disabling).
Software may use this bit when enabling or
disabling the VC. This bit indicates the status of
the process of Flow Control initialization. It is set
by default on Reset, as well as whenever the
corresponding Virtual Channel is Disabled or the
Link is in the DL_Down state. It is cleared when
the link successfully exits the FC_INIT2 state.
Before using a Virtual Channel, software must
check whether the VC Negotiation Pending fields
for that Virtual Channel are cleared in both
Components on a Link.
check whether the VC Negotiation Pending fields
for that Virtual Channel are cleared in both
Components on a Link.
0 RO 0b Core
Reserved ()