Справочник Пользователя для Intel i7-640M CN80617006936AA
Модели
CN80617006936AA
Datasheet
73
Signal Description
6.4
PCI Express Graphics Interface Signals
PM_EXT_TS#[0]
PM_EXT_TS#[1]
PM_EXT_TS#[1]
External Thermal Sensor Input: If the
system temperature reaches a dangerously
high value then this signal can be used to
trigger the start of system memory
throttling.
system temperature reaches a dangerously
high value then this signal can be used to
trigger the start of system memory
throttling.
I
CMOS
PM_SYNC
Power Management Sync: A sideband
signal to communicate power management
status from the platform to the processor.
signal to communicate power management
status from the platform to the processor.
I
CMOS
PRDY#
PRDY#: A processor output used by debug
tools to determine processor debug
readiness.
tools to determine processor debug
readiness.
O
Asynchronous GTL
PREQ#
PREQ#: Used by debug tools to request
debug operation of the processor.
debug operation of the processor.
I
Asynchronous GTL
RESET_OBS#
This signal is an indication of the processor
being reset.
being reset.
O
Asynchronous CMOS
RSTIN#
Reset In: When asserted this signal will
asynchronously reset the processor logic.
This signal is connected to the PLTRST#
output of the PCH.
asynchronously reset the processor logic.
This signal is connected to the PLTRST#
output of the PCH.
I
CMOS
RSVD
RSVD_TP
RSVD_NCTF
RESERVED. All signals that are RSVD and
RSVD_NCTF must be left unconnected on the
board. However, Intel recommends that all
RSVD_TP signals have via test points.
RSVD_NCTF must be left unconnected on the
board. However, Intel recommends that all
RSVD_TP signals have via test points.
No Connect
Test Point
Non-Critical to
Function
SM_DRAMRST#
DDR3 DRAM Reset: Reset signal from
processor to DRAM devices. One for all
channels or SO-DIMMs.
processor to DRAM devices. One for all
channels or SO-DIMMs.
O
DDR3
Table 29.
PCI Express Graphics Interface Signals
Signal Name
Description
Direction/Buffer
Type
PEG_RX[15:0]
PEG_RX#[15:0]
PCI Express Graphics Receive
Differential Pair
Differential Pair
I
PCI Express
PEG_TX[15:0]
PEG_TX#[15:0]
PCI Express Graphics Transmit
Differential Pair
Differential Pair
O
PCI Express
PEG_ICOMPI
PCI Express Graphics Input Current
Compensation
Compensation
I
A
PEG_ICOMPO
PCI Express Graphics Output Current
Compensation
Compensation
I
A
PEG_RCOMPO
PCI Express Graphics Resistance
Compensation
Compensation
I
A
PEG_RBIAS
PCI Express Resistor Bias Control
I
A
Table 28.
Reset and Miscellaneous Signals (Sheet 2 of 2)
Signal Name
Description
Direction/Buffer
Type