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Advanced Chipset Features 

The "Advanced Chipset Features" includes settings for the chipset dependent 
features. These features are related to system performance. 

 

Advanced Chipset features > DRAM Timing Selectable 
Available options:

 

 

z 

By SPD: System will define timing according to default of Dram. (Default) 

z 

Manual: Allow user to define timing himself. 

Advanced Chipset features > CAS Latency Time 
When synchronous DRAM is installed, the number of clock cycles of CAS latency 
depends on the DRAM timing.   
Available options: 5, 4, 3, 6, Auto 

Advanced Chipset features > DRAM RAS# to CAS# Delay 
This field lets user to insert a timing delay between the CAS and RAS strobe 
signals, used when RAM is written to, read from, or refreshed. Fast gives fater 
performance; and Slow give more stable performance. This field applies only 
when synchronous DRAM is installed in the system.   
Available options: 2, 3, 4, 5, 6 Auto 

Advanced Chipset features > DRAM RAS# Precharge 
If an insufficient number of cycles are allowed for the RAS to accumulate its 
charge before DRAM refresh, the refresh may be incomplete and the DRAM may 
fail to retain data. Fast give faster performance; and Slow gives more stable 
performance. This field applies only when synchronous DRAM is installed in the 
system.  
Available options: 2, 3, 4, 5, 6, Auto