Справочник Пользователя для Aopen p5tc-hw
Hardware Installation
2-30
Following table are possible DRAM combinations that is NOT recommended:
SIMM
Data chip
Data chip
SIMM
Parity chip
Parity chip
Bit size
per side
per side
Single/
Double
side
Double
side
Chip
count
count
SIMM
size
size
Recommended
1M by 1
None
1Mx32
x1
32
4MB
No
1M by 1
1M by 1
1Mx36
x1
36
4MB
No
1M by 4
1M by 1
1Mx36
x2
24
8MB
No
4M by 1
None
4Mx32
x1
32
16MB
No
4M by 1
4M by 1
4Mx36
x1
36
16MB
No
16M by 1
None
16Mx32
x1
32
64MB
No
16M by 1
16M by 1
16Mx36
x1
36
64MB
No
DIMM
Data chip
Data chip
Bit size per
side
side
Single/
Double side
Double side
Chip
count
count
DIMM size
Recommended
4M by 4
4Mx64
x1
16
32MB
No
4M by 4
4Mx64
x2
32
64MB
No
16M by 4
16Mx64
x1
16
128MB
No
16M by 4
16Mx64
x2
32
256MB
No
Memory error checking is supported by parity check. To use parity check you
need 36 bit SIMM (32 bit data + 4 bit parity), which are automatically detected by
BIOS.
need 36 bit SIMM (32 bit data + 4 bit parity), which are automatically detected by
BIOS.
Tip: The parity mode uses 1 parity bit for each byte,
normally it is even parity mode, that is, each time the
memory data is updated, parity bit will be adjusted to
have even count "1" for each byte. When next time, if
memory is read with odd number of "1", the parity error
is occurred and this is called single bit error detection.
normally it is even parity mode, that is, each time the
memory data is updated, parity bit will be adjusted to
have even count "1" for each byte. When next time, if
memory is read with odd number of "1", the parity error
is occurred and this is called single bit error detection.