Инструкции По Обслуживанию для MiTAC w130
14
Destination
Alpha
Vertex
Cahec
Maximum 3D resolution of 1600x1200 x32 bpp at 85 Hz
Optimal
3D
resolution
supported
Fast
Clear
support
ROP
support
1.3.6 HUB Interface for ICH4
266 MB/s point to point hub interface to ICH4-M
66-M
Hz
base
clock
Supports the following traffic types to the ICH4-M
Hub
interface-to
DRAM
CPU-to-Hub
interface
Messaging
MSI
interrupt
messages
Power Management state change
SMI, SCI, and SERR error indication
Power
Management
SMRAM space remapping to A0000h (128-KB)
Supports extended SMRAM space above 256- MB ,additional 1 MB TSEG
from top of Memory, cacheable (cacheability controlled by CPU)
APM rev 1.2 compliant power management
Supports Suspend to System Memory(S3),Suspend to Disk(S4) and Hard
Off/Total Reboot(S5)
ACPI 1.0b 2.0 Support
1.3.7 I/O Controller Hub: INTEL 82801DBM
The INTEL 82801DBM ICH4-M integrates three Universal Serial Bus 2.0
Host Controllers, the Audio Controller with AC 97 Interface, the IDE
Master/Slave controllers, and Intel®’ I/O Hub architecture. The PCI to LPC
Bridge, I/O Advanced Programmable Interrupt Controller, legacy system
I/O and legacy power management functionalities are integrated as well.
Master/Slave controllers, and Intel®’ I/O Hub architecture. The PCI to LPC
Bridge, I/O Advanced Programmable Interrupt Controller, legacy system
I/O and legacy power management functionalities are integrated as well.
The integrated Universal Serial Bus Host Controllers features Dual
Independent UHCI Compliant Host controllers with six USB ports
delivering 480 Mb/s bandwidth and rich connectivity. Besides, Legacy
USB devices as well as over current detection are also implemented.
delivering 480 Mb/s bandwidth and rich connectivity. Besides, Legacy
USB devices as well as over current detection are also implemented.