Справочник Пользователя для Intel Xeon E5420 SLANV

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Platform Configurations
These 45nm processors are validated with two different chipsets, providing a choice of flexible, dual-processor-capable platforms  
for a wide range of applications. These include storage area networks, network attached storage, routers, IP-PBX, converged/unified 
communications platforms, sophisticated content firewalls, unified threat management systems, medical imaging equipment, military 
signal and image processing, and telecommunications (wireless and wireline) servers.
Figure 2: Intel® 5000P chipset-based platforms 
Intel® 5000P 
Memory 
Controller Hub
DDR2 FB-DIMM
Intel® 
6321ESB 
I/O 
Controller 
Hub
Up to 2x 
1333 MHz
Configurable PCI Express* 
with 28 lanes
Configurable up to
64 GB max memory
DDR2 FB-DIMM
DDR2 FB-DIMM
DDR2 FB-DIMM
Intel® Xeon® 
Processor 5400, 
5200 or 3000
4
 
Series 
Intel® Xeon® 
Processor 5400 
or 5200 Series 
Up to 2x 
1333 MHz
Intel® Xeon® 
Processor 5400, 
5200 or 3000
4
 
Series 
Intel® Xeon® 
Processor 5400 
or 5200 Series 
Intel® 5100 
Memory 
Controller Hub
Configurable up to
48 GB max memory
DDR2 533/667
DDR2 533/667
Intel® I/O
Controller 
Hub 9R
24 PCI Express lanes configurable 
as x4, x8, or x16 wide links
6 PCI Express* lanes 
configurable as 1 x4 
or 6 x1 wide links
Figure 3: Intel® 5100 Memory Controller Hub  
chipset-based platforms 
•  Intel® 5000P chipset-based platforms are ideal for full  
performance and memory-intense applications by providing  
a maximum FB-DIMM memory capacity of 64 GB, 28 lanes of  
PCI Express*,  and accelerated I/O options. This platform offers 
quick migration for customers with existing Intel 5000P  
chipset-based designs due to the LGA 771 socket, common  
with the quad-core 5300 series and dual-core 5100 series,  
eliminating software tuning and minimizing hardware  
qualification efforts (see Figure 2).  
•  Intel® 5100 Memory Controller Hub (MCH) chipset-based 
platforms are ideal for bladed and dense bladed applications  
requiring less than 200 watts, including AdvancedTCA* and 
NEBS-compliant solutions. Platform power savings is derived 
from lower TDP in the MCH (25.7 watts TDP at 1333 MHz  
front-side bus [FSB] and 23.0 watts TDP at 1066 MHz FSB),  
the efficient next-generation Intel® I/O Controller Hub 9R at  
4.3W TDP, and standard native DDR2 memory technology  
with a maximum capacity of 48 GB (see Figure 3).