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TFA9812_2
© NXP B.V. 2009. All rights reserved.
Preliminary data sheet
Rev. 02 — 22 January 2009
37 of 66
NXP Semiconductors
TFA9812
BTL stereo Class-D audio amplifier with I
2
S input
9.5.9 TFA9812 temperature
9.5.10 Miscellaneous status
Table 46.
Bit description of register 2Dh: digital-in clock configuration
Bit
Symbol
Description
9 to 0
TP_THR[9:0]
Reduction on the maximum temperature of 125
°
C.
The reduction can be calculated by:
reduction
INTEGER
(TP_THR[9:0]
2.4552
-----------------------------------
in
°
C
=
Table 47.
Register 2Fh: TFA9812 temperature
Bit
15
14
13
12
11
10
9
8
Symbol
RSD
RSD
RSD
RSD
RSD
RSD
TEMP9
TEMP8
Default
-
-
-
-
-
-
-
-
Bit
7
6
5
4
3
2
1
0
Symbol
TEMP7
TEMP6
TEMP5
TEMP4
TEMP3
TEMP2
TEMP1
TEMP0
Default
-
-
-
-
-
-
-
-
Table 48.
Bit description of register 2Dh: digital-in clock configuration
Bit
Symbol
Description
9 to 0
TEMP[9:0]
Temperature of the TFA9812, which can be calculated in
°
C using: Temp TFA9812 = (1023
TEMP[9:0]) / 2.4552
Table 49.
Register 30h: miscellaneous status
Bit
15
14
13
12
11
10
9
8
Symbol
RSD
RSD
RSD
RSD
RSD
RSD
RSD
RSD
Default
-
-
-
-
-
-
-
-
Bit
7
6
5
4
3
2
1
0
Symbol
RSD
OFP
UFP
UVP1V8
UVP3V3
DIAG
LP
MUTE
Default
-
-
-
-
-
-
-
-
Table 50.
Bit description of register 30h: miscellaneous status
Bit
Symbol
Description
6
OFP
PLL frequency-over-range indicator:
0 = PLL frequency in supported range
1 = PLL frequency exceeds highest supported
frequency value
5
UFP
PLL frequency under-range indicator:
0 = PLL frequency in supported range
1 = PLL frequency below lowest supported frequency
value
4
UVP1V8
Undervoltage detector for pins 4 and 41:
0 = No UVP has been detected
1 = A UVP has been detected since the last read-out of
the register