Справочник Пользователя для National Instruments NI PXIe-6672
Chapter 3
Hardware Overview
3-8
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of the PXI trigger lines is used as the source for the update, frequency
generation will not start until a rising edge occurs on the PXI trigger
selected.
generation will not start until a rising edge occurs on the PXI trigger
selected.
Note
NI-Sync software defaults to an immediate update. If a PXI trigger is used instead,
the user must specify the update signal source before setting any of the other DDS
properties.
properties.
When more then one NI PXIe-6672 is used in a multiple chassis setup, the
DDS frequency of both boards can be synchronized. The DDS system
clock is phase locked to PXI_CLK10, when two or more chassis share a
common 10 MHz clock, the DDS outputs will also be phase locked (refer
to the
DDS frequency of both boards can be synchronized. The DDS system
clock is phase locked to PXI_CLK10, when two or more chassis share a
common 10 MHz clock, the DDS outputs will also be phase locked (refer
to the
section for information on how to ensure
that two or more chassis have close PXI_CLK10 phase alignment). To fully
synchronize the DDS outputs a common update signal source must be used
and routed to the selected PXI trigger. A synchronous route to PXI_CLK10
provides the best results. Refer to the
synchronize the DDS outputs a common update signal source must be used
and routed to the selected PXI trigger. A synchronous route to PXI_CLK10
provides the best results. Refer to the
section for details on
routing trigger signals.
The NI PXIe-6672 DDS can adjust the phase of the generated clock by up
to ±5 ns. This may be used to tighten the synchronization between two or
more DDS devices in a multi-chassis setup, or to compensate for delays
caused by different cable lengths.
to ±5 ns. This may be used to tighten the synchronization between two or
more DDS devices in a multi-chassis setup, or to compensate for delays
caused by different cable lengths.
PXI_CLK10 and TCXO
The NI PXIe-6672 features a precision 10 MHz TCXO. The frequency
accuracy of this clock is several orders of magnitude greater than the
frequency accuracy of the native 10 MHz PXI backplane clock
(PXI_CLK10).
accuracy of this clock is several orders of magnitude greater than the
frequency accuracy of the native 10 MHz PXI backplane clock
(PXI_CLK10).
The TCXO contains circuitry to measure the temperature of the oscillator.
It uses the temperature to adjust its frequency output according to the
crystal’s known frequency variation across its operating temperature range.
It uses the temperature to adjust its frequency output according to the
crystal’s known frequency variation across its operating temperature range.
An NI PXIe-6672 module in the System Timing Slot of a PXI Express
chassis can replace the native PXI 10 MHz backplane frequency reference
clock (PXI_CLK10) with the more stable and accurate output of the
TCXO. All other PXI modules in the chassis that reference the 10 MHz
backplane clock benefit from this more accurate frequency reference.
Furthermore, the DDS chip on the NI PXIe-6672 references its output to
the backplane clock and also takes advantage of the superior TCXO
accuracy. The TCXO does not automatically replace the native 10 MHz
chassis can replace the native PXI 10 MHz backplane frequency reference
clock (PXI_CLK10) with the more stable and accurate output of the
TCXO. All other PXI modules in the chassis that reference the 10 MHz
backplane clock benefit from this more accurate frequency reference.
Furthermore, the DDS chip on the NI PXIe-6672 references its output to
the backplane clock and also takes advantage of the superior TCXO
accuracy. The TCXO does not automatically replace the native 10 MHz