Справочник Пользователя для IBM powerpc 750gx
User’s Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
Signal Descriptions
Page 258 of 377
gx_07.fm.(1.2)
March 27, 2006
7.2.4.2 Transfer Size (TSIZ[0–2])—Output
eieio
Address only
1
0
0
0
0
N/A
External control word write
Single-beat write
1
0
1
0
0
N/A
TLB Invalidate
Address only
1
1
0
0
0
N/A
External control word read
Single-beat read
1
1
1
0
0
N/A
lwarx
reservation set
Address only
0
0
0
0
1
N/A
Reserved
—
0
0
1
0
1
N/A
tlbsync
Address only
0
1
0
0
1
N/A
icbi
Address only
0
1
1
0
1
N/A
Reserved
—
1
X
X
0
1
N/A
Write-with-flush
Single-beat write or burst
0
0
0
1
0
Flush, cancel reserva-
tion
tion
Write-with-kill
Single-beat write or burst
0
0
1
1
0
Kill, cancel reservation
Read
Single-beat read or burst
0
1
0
1
0
Clean or flush
Read-with-intent-to-modify
Burst
0
1
1
1
0
Flush
Write-with-flush-atomic
Single-beat write
1
0
0
1
0
Flush, cancel reserva-
tion
tion
Reserved
N/A
1
0
1
1
0
N/A
Read-atomic
Single-beat read or burst
1
1
0
1
0
Clean or flush
Read-with-intent-to modify-atomic Burst
1
1
1
1
0
Flush
Reserved
—
0
0
0
1
1
N/A
Reserved
—
0
0
1
1
1
N/A
Read-with-no-intent-to-cache
Single-beat read or burst
0
1
0
1
1
Clean
Reserved
—
0
1
1
1
1
N/A
Reserved
—
1
X
X
1
1
N/A
State
Asserted/
Negated
Negated
For memory accesses, these signals, along with the transfer burst (TBST)
signal, indicate the data-transfer size for the current bus operation, as shown
in Table 7-3 on page 259. Table 8-4 on page 296 shows how the transfer
size signals are used with the address signals for aligned transfers.
Table 8-5 on page 298 shows how the transfer size signals are used with the
address signals for misaligned transfers.
signal, indicate the data-transfer size for the current bus operation, as shown
in Table 7-3 on page 259. Table 8-4 on page 296 shows how the transfer
size signals are used with the address signals for aligned transfers.
Table 8-5 on page 298 shows how the transfer size signals are used with the
address signals for misaligned transfers.
For external control instructions (eciwx and ecowx), TSIZ[0–2] are used to
output bits 29–31 of the External Access Register (EAR), which are used to
form the resource ID (TBST||TSIZ0–TSIZ2).
output bits 29–31 of the External Access Register (EAR), which are used to
form the resource ID (TBST||TSIZ0–TSIZ2).
Table 7-2. PowerPC 750GX Snoop Hit Response
(Page 2 of 2)
60x Bus Specification Command
Transaction
TT0
TT1
TT2
TT3
TT4
PowerPC 750GX Bus
Snooper;
Action on Hit