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CHAPTER 14   RESET FUNCTION
Table 14-1.  Hardware Status after Reset (1/2)
Hardware
Status after Reset
Program counter (PC) 
Note1
The contents of reset vector
tables (0000H and 0001H)
are set.
Stack pointer (SP)
Undefined
Program status word (PSW)
02H
Data memory
Undefined 
Note2
General register
Undefined 
Note2
Port 0, Port 1, Port 3, Port 5, Port 7,
00H
Port 10 (P0, P1, P3, P5, P7, P10)
Port mode register (PM0, PM1, PM3, PM5, PM7, PM10)
FFH
Pull-up resistor option register (PUOH, PUOL)
00H
Processor clock control register (PCC)
04H
Oscillation mode selection register (OSMS)
00H
Memory size switching register (IMS)
Note3
Oscillation stabilization time select register (OSTS)
04H
Timer clock selection register 0 (TCL0)
00H
8-bit timer/event counter
Timer register (TM5, TM6)
00H
5 and 6
Compare registers (CR50, CR60)
00H
Clock select register (TCL5, TCL6)
00H
Mode control registers (TMC5, TMC6)
00H
Watchdog timer
Clock select register (TCL2)
00H
Mode register (WDTM)
00H
Serial Interface
Mode register (CSIM2)
00H
Asynchronous serial interface mode register (ASIM)
00H
Asynchronous serial interface status register (ASIS)
00H
Baud rate generator control register (BRGC)
00H
Transmit shift register (TXS)
FFH
Receive buffer register (RXB)
A/D converter
Mode register (ADM)
01H
Conversion result register (ADCR)
Undefined
Input select register (ADIS)
00H
Port (Output latch)
RAM