Справочник Пользователя для UTStarcom MSG2000
Page 2-34
User Manual
Continuous Computing Corporation
Continuous Computing Corporation
FlexPacket ATCA PP50 Packet Processor
Preliminary
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LA-1 Interface
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Connected to a mezzanine for TCAM add on options
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Four RGMII Gigabit Ethernet interfaces
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One interface is routed to the front panel as the management port
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Two interfaces are routed to the base switch
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One interface to the other XLR through serial interface
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Two XGMII 10 Gigabit Ethernet interfaces routed to the Fabric Ethernet switch
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Local Bus / Peripheral Interface
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8/16/32 bit devices, 66MHz
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Two 32M bytes FLASH for boot firmware
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CompactFLASH socket for additional storage
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Two 8MB PSRAM
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Control Complex Programmable Logic Devices (CPLD)
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Two UART Ports
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Port 1 connected to CNODE for FlexConsole
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Port 2 connected to CNODE as a command channel
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Two I2C Ports
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Port 1 connected to two Mini-DIMM sockets for SPD
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Port 2 connected to a serial EEPROM
2.2.5.1 PSRAM (Flight Recorder Memory)
Each XLR subsystem on the PP50 includes PSRAM (pseudo-static DRAM). I is
sometimes called flight recorder memory because it is unique in that it is not cleared
or initialized during board resets/reboots, so it can be used to preserve critical state
or logs across such events.
After a power cycle, the contents of the PSRAM are undefined. It is recommended
that a checksum, CRC, or some other data integrity check be used on the data in the
PSRAM to ensure that random powerup contents are not interpreted as valid data.
Typical uses for the PSRAM are to store routing tables, call routing information,
transaction checkpoints, or log files. Having these tables available in memory can
enable much faster application startup after a board reset or watchdog timeout.
Because the PSRAM is separate from main memory, neither the bootloader nor the
Linux kernel will disturb its contents. Note, that the bootloader PSRAM diagnostic
copies the contents to a safe area before testing the PSRAM, then copies the data
back in.
To access the PSRAM from RMIOS, you can simply configure a pointer to point to
the PSRAM base address and access it directly.