Справочник Пользователя для Intel S2400GP4 DBS2400GP4
Модели
DBS2400GP4
Functional Architecture
Intel
®
Server Board S2400GP TPS
Revision 1.01
Intel order number G50295-002
26
Notes:
1. Physical Rank is used to calculate DIMM Capacity.
2. Supported and validated DRAM Densities are 2Gb and 4Gb.
3. Command Address Timing is 1N.
4. The speeds are estimated targets and will be verified through simulation.
5. For Memory Population Rules, please refer to the Romley Platform Design Guide.
6. DDP - Dual Die Package DRAM stacking. P
– Planer monolithic DRAM Die.
Supported and Validated
Supported but not Validated
3.6.2
Memory population rules
Note: Although mixed DIMM configurations are supported, Intel
®
only performs platform
validation on systems that are configured with identical DIMMs installed.
Each processor provides four banks of memory, each capable of supporting up to 2 DIMMs.
DIMMs are organized into physical slots on DDR3 memory channels that belong to
processor sockets.
processor sockets.
The memory channels from processor socket 1 are identified as Channel A, B and C.
The memory channels from processor socket 2 are identified as Channel D, E and F.
The memory channels from processor socket 2 are identified as Channel D, E and F.
The silk screened DIMM slot identifiers on the board provide information about the
channel, and therefore the processor to which they belong. For example, DIMM_A1 is
the first slot on Channel A on processor 1; DIMM_D1 is the first DIMM socket on
Channel D on processor 2.
channel, and therefore the processor to which they belong. For example, DIMM_A1 is
the first slot on Channel A on processor 1; DIMM_D1 is the first DIMM socket on
Channel D on processor 2.
The memory slots associated with a given processor are unavailable if the
corresponding processor socket is not populated.
corresponding processor socket is not populated.
A processor may be installed without populating the associated memory slots provided a
second processor is installed with associated memory.
second processor is installed with associated memory.
In this case, the memory is
shared by the processors.
However, the platform suffers performance degradation and
latency due to the remote memory.
Processor sockets are self-contained and autonomous. However, all memory subsystem
support (such as Memory RAS, Error Management,) in the BIOS setup are applied
commonly across processor sockets.
support (such as Memory RAS, Error Management,) in the BIOS setup are applied
commonly across processor sockets.
On the Intel
®
Server Board S2400GP, a total of 12 DIMM slots is provided (2 CPUs and 3
Channels/CPU). The nomenclature for DIMM sockets is detailed in the following table:
Table 7. Intel
®
Server Board S2400GP DIMM Nomenclature
Processor Socket 1
Processor Socket 2
(0)
Channel A
(1)
Channel B
(2)
Channel C
(0)
Channel D
(1)
Channel E
(2)
Channel F