Справочник Пользователя для HP A2Y15AV

Datasheet, Volume 2

119

Processor Configuration Registers 

PCI Express* Hot-Plug is not supported on the processor. 

10

RO

0h

9:4

RO-V

00h

Uncore

Negotiated Link Width (NLW) 
This field indicates negotiated link width. This field is valid only 

when the link is in the L0, L0s, or L1 states (after link width 

negotiation is successfully completed).
00h = Reserved
01h = X1
02h = X2
04h = X4
08h = X8
10h = X16
All other encodings are reserved. 

3:0

RO

0h

Current Link Speed (CLS)
This field indicates the negotiated Link speed of the given PCI 

Express Link. 
The encoding is the binary value of the bit location in the 

Supported Link Speeds Vector (in the Link Capabilities 2 register) 

that corresponds to the current Link speed. 
For example, a value of 0010b in this field indicates that the 

current Link speed is that corresponding to bit 2 in the Supported 

Link Speeds Vector, which is 5.0 GT/s. 
All other encodings are reserved. 
The value in this field is undefined when the Link is not up.

31:19

RW-O

0000h

Uncore

Physical Slot Number (PSN) 
This field indicates the physical slot number attached to this Port.
BIOS Requirement: This field must be initialized by BIOS to a 

value that assigns a slot number that is globally unique within the 

chassis.

18

RO

1b

Uncore

No Command Completed Support (NCCS) 
When set to 1b, this bit indicates that this slot does not generate 

software notification when an issued command is completed by 

the Hot-Plug Controller. This bit is only permitted to be set to 1b 

if the hot-plug capable port is able to accept writes to all fields of 

the Slot Control register without delay between successive 

writes.

17

RO

0b

Uncore

Reserved for Electromechanical Interlock Present (EIP) 
When set to 1b, this bit indicates that an Electromechanical 

Interlock is implemented on the chassis for this slot.