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Datasheet, Volume 2
155
Processor Configuration Registers 
2.8.11
GMADR—Graphics Memory Range Address Register
GMADR is the PCI aperture used by S/W to access tiled graphics surfaces in a linear 
fashion.
B/D/F/Type:
0/2/0/PCI
Address Offset:
18–1Fh
Reset Value:
000000000000000Ch
Access:
RW, RO, RW-L
Size:
64 bits
Bit
Access
Reset 
Value
RST/
PWR
Description
63:39
RW
0000000h
FLR, 
Uncore
Reserved for Memory Base Address (RSVDRW) 
Must be set to 0 since addressing above 512 GB is not supported.
38:29
RW
00000000
00b
FLR, 
Uncore
Memory Base Address (MBA) 
set by the OS, these bits correspond to address signals 38:29.
28
RW-L
0b
FLR, 
Uncore
512 MB Address Mask (ADMSK512) 
This Bit is either part of the Memory Base Address (RW) or part 
of the Address Mask (RO), depending on the value of MSAC[2:1].
Se
 for details.
27
RW-L
0b
FLR, 
Uncore
256 MB Address Mask (ADMSK256) 
This bit is either part of the Memory Base Address (RW) or part of 
the Address Mask (RO), depending on the value of MSAC[2:1]. 
Se
 for details.
26:4
RO
000000h
Uncore
Address Mask (ADM) 
Hardwired to 0s to indicate at least 128 MB address range.
3
RO
1b
Uncore
Prefetchable Memory (PREFMEM) 
Hardwired to 1 to enable prefetching.
2:1
RO
10b
Uncore
Memory Type (MEMTYP) 
00 = 32-bit address.
10 = 64-bit address
0
RO
0b
Uncore
Memory/IO Space (MIOS) 
Hardwired to 0 to indicate memory space.