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Datasheet, Volume 2

199

Processor Configuration Registers 

7:6

RO

00b

Uncore

Reserved for Attention Indicator Control (AIC)
If an Attention Indicator is implemented, writes to this field set 

the Attention Indicator to the written state. Reads of this field 

must reflect the value from the latest write, even if the 

corresponding hot-plug command is not complete, unless 

software issues a write without waiting for the previous command 

to complete in which case the read value is undefined. If the 

indicator is electrically controlled by chassis, the indicator is 

controlled directly by the downstream port through 

implementation specific mechanisms.
00 = Reserved
01 = On
10 = Blink
11 = Off 
If the Attention Indicator Present bit in the Slot Capabilities 

register is 0b, this field is permitted to be read only with a value 

of 00b.

5

RO

0b

Uncore

Reserved for Hot-plug Interrupt Enable (HPIE)
When set to 1b, this bit enables generation of an interrupt on 

enabled hot-plug events. 
Reset Value of this field is 0b. 
If the Hot-plug Capable field in the Slot Capabilities register is set 

to 0b, this bit is permitted to be read-only with a value of 0b.

4

RO

0b

Uncore

Reserved for Command Completed Interrupt Enable (CCI)
If Command Completed notification is supported (as indicated by 

No Command Completed Support field of Slot Capabilities 

Register), when set to 1b, this bit enables software notification 

when a hot-plug command is completed by the Hot-Plug 

Controller. 
Reset Value of this field is 0b. 
If Command Completed notification is not supported, this bit must 

be hardwired to 0b.

3

RO

0b

Uncore

Presence Detect Changed Enable (PDCE)
When set to 1b, this bit enables software notification on a 

presence detect changed event.

2

RO

0b

Uncore

Reserved for MRL Sensor Changed Enable (MSCE)
When set to 1b, this bit enables software notification on a MRL 

sensor changed event. 
Reset Value of this field is 0b. 
If the MRL Sensor Present field in the Slot Capabilities register is 

set to 0b, this bit is permitted to be read-only with a value of 0b.

1

RO

0b

Uncore

Reserved for Power Fault Detected Enable (PFDE)
When set to 1b, this bit enables software notification on a power 

fault event. 
Reset Value of this field is 0b. 
If Power Fault detection is not supported, this bit is permitted to 

be read-only with a value of 0b.

0

RO

0b

Uncore

Reserved for Attention Button Pressed Enable (ABPE)
When set to 1b, this bit enables software notification on an 

attention button pressed event.