Справочник Пользователя для Intel G555 BXC80623G555
Модели
BXC80623G555
Processor Configuration Registers
24
Datasheet, Volume 2
There are sub-ranges within the PCI Memory address range defined as APIC
Configuration Space, MSI Interrupt Space, and High BIOS Address Range. The
exceptions listed above for internal graphics and the PCI Express ports MUST NOT
overlap with these ranges.
Configuration Space, MSI Interrupt Space, and High BIOS Address Range. The
exceptions listed above for internal graphics and the PCI Express ports MUST NOT
overlap with these ranges.
Figure 2-4. PCI Memory Address Range
DMI Interface
(subtractive decode)
FEF0_0000h
4 GB – 2 MB
MSI Interrupts
FEE0_0000h
PCI Express Configuration
Space
E000_0000h
High BIOS
FFE0_0000h
FFFF_FFFFh
4 GB
4 GB – 17 MB
DMI Interface
(subtractive decode)
FED0_0000h
4 GB – 18 MB
Local (CPU) APIC
FEC8_0000h
4 GB – 19 MB
I/O APIC
FEC0_0000h
4 GB – 20 MB
DMI Interface
(subtractive decode)
F000_0000h
4 GB – 256 MB
Possible address
range/size (not
ensured)
4 GB – 512 MB
DMI Interface
(subtractive decode)
TOLUD
BARs, Internal
Graphics
ranges, PCI
Express Port,
CHAPADR could
be here.