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Processor Uncore Configuration Registers
162
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
13.6.1.2
INTCONTROL
Interrupt Configuration Register
2:0
RW_LB
0x0
NodeId of the local register (LclNodeId):
Node Id of the local Socket
Type:
CFG
PortID: N/A
Bus:
1
Device: 11
Function:
0
Offset:
0x40
Bit
Attr
Default
Description
Type:
CFG
PortID: N/A
Bus:
1
Device: 11
Function:
0
Offset:
0x48
Bit
Attr
Default Description
31:19
RV
-
Reserved.
18:18
RW_LB
0x0
IA32 Logical Flat or Cluster Mode Override Enable (LogFlatClustOvrEn):
0 : IA32 Logical Flat or Cluster Mode bit is locked as Read only bit. 
1 : IA32 Logical Flat or Cluster Mode bit may be written by SW, values 
written by xTPR update are ignored. 
For one time override of the IA-32 Logical Flat or Cluster Mode value, return 
this bit to its default state after the bit is changed. Leaving this bit as “1” will 
prevent automatic update of the filter.
17:17
RW_LBV
0x0
IA32 Logical Flat or Cluster Mode (LogFltClustMod):
Set by BIOS to indicate if the OS is running logical flat or logical cluster 
mode. This bit can also be updated by IntPrioUpd messages. 
This bit reflects the setup of the filter at any given time. 
0 - flat, 
1 - cluster.
16:16
RW_LB
0x0
Cluster Check Sampling Mode (ClastChkSmpMod):
0: Disable checking for Logical_APICID[31:0] being nonzero when sampling 
flat / cluster mode bit in the IntPrioUpd message as part of setting bit 1 in 
this register 
1: Enable the above checking
15:11
RV
-
Reserved.
10:8
RW_LB
0x0
Vecor Based Hash Mode Control (HashModCtr):
Indicates the hash mode control for the interrupt control.
Select the hush function for the Vector based Hash Mode interrupt 
redirection control : 
000 select bits 7:4 / 5:4 for vector cluster / flat algorithm 
001 select bits 6:3 / 4:3 
010 select bits 4:1 / 2:1 
011 select bits 3:0 / 1:0 
other - reserved
7:7
RV
-
Reserved.