Справочник Пользователя для Intel E7-8891 v2 CM8063601377422

Intel

®

 Xeon

® 

Processor E7-2800/4800/8800 v2 Product Family

447

Datasheet Volume Two: Functional Description, February 2014

26:26

RW

0x0

mc_err_msk:

Memory Controller Error Mask.
Note: This bit is only available for Intel Xeon processor E7-2800/4800/8800 

v2 product family Product Family processor B0 stepping in Global Corrected 

Error type (refer to the corresponding status registers GC**ERRST). For A0 

and other (Fatal and Non-Fatal) error type, the bit is Reserved.

25:25

RW

0x0

vtd_err_msk:

Intel® VT-d Error Mask

24:24

RW

0x0

mi_err_msk:

Miscellaneous Error Mask

23:23

RW

0x0

iio_err_msk:

IIO Core Error Enable
This bit enables/masks the error detected in the IIO Core.

22:21

RV

-

Reserved3:

Reserved

20:20

RW

0x0

dmi_err_msk:

DMI Error Enable
This bit enables/masks the error detected in the DMI[0] Port.

19:16

RW

0x0

Reserved2:

Reserved

15:5

RW

0x0

pcie_err_msk:

PCIe* Error Mask
Masks the error detected with the associated
PCIe* port.
Bit 5: Port 0
Bit 6: n/a
Bit 7: n/a
Bit 8: Port 2a
Bit 9: Port 2b
Bit 10: Port 2c
Bit 11: Port 2d
Bit 12: Port 3a
Bit 13: Port 3b
Bit 14: Port 3c
Bit 15: Port 3d

4:2

RV

-

Reserved1:

Reserved

1:1

RW

0x0

irp1_err_msk:

IRP1 Error Mask

0:0

RW

0x0

irp0_err_msk:

IRP0 Error Mask
When set, disables logging of this error