Справочник Пользователя для Intel E7-4850 v2 CM8063601272906
Модели
CM8063601272906
Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family
365
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.6.25 TOLM
Top of Low Memory
14.6.26 TOHM
Top of High Memory.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0xc8
Bit
Attr
Default
Description
63:51
RV
-
Reserved:
50:16
RW_LB
0x0
limit_address:
[50:16] of generic memory address range that needs to be protected from
inbound dma accesses. The protected memory range can be anywhere in
the memory space addressable by the processor. Addresses that fall in this
range that is, GenProtRange.Base[63:16] <= Address [63:16] <=
GenProtRange. Limit [63:16], are completer aborted by IIO.
Setting the Protected range base address greater than the limit address
Setting the Protected range base address greater than the limit address
disables the protected memory region.
Note that this range is orthogonal to Intel
Note that this range is orthogonal to Intel
®
VT-d spec defined protected
address range. This register is programmed once at boot time and does not
change after that, including any quiesce flows.
This region is expected to be used to protect against PAM region accesses
This region is expected to be used to protect against PAM region accesses
inbound, but could also be used for other purposes, if needed.
15:0
RV
-
Reserved:
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0xd0
Bit
Attr
Default
Description
31:26
RW_LB
0x0
addr:
TOLM Address. Indicates the top of low dram memory which is aligned to a
64MB boundary. A 32 bit transaction that satisfies ’0 <= Address[31:26]
<= TOLM[31:26]’ is a transaction towards main memory.
25:0
RV
-
Reserved.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0xd4
Bit
Attr
Default
Description
63:26
RW_LB
0x0
addr:
TOHM Address. Indicates the limit of an aligned 64 MB granular region that
decodes >4 GB addresses towards system dram memory. A 64-bit
transaction that satisfies ’4G <= A[63:26] <= TOHM[63:26]’ is a
transaction towards main memory. This register is programmed once at
boot time and does not change after that, including during quiesce flows.
25:0
RV
-
Reserved.