Справочник Пользователя для Acer E3-1220 v3 KC.12201.3E3
Модели
KC.12201.3E3
Raw
Card
Version
DIMM
Capacity
DRAM
Device
Technology
DRAM
Organization
# of
DRAM
Devices
# of
Physical
Devices
Ranks
# of
Row / Col
Address
Bits
# of
Banks
Inside
DRAM
Page Size
A
1 GB
1 Gb
128 M X 8
8
1
14/10
8
8K
B
2 GB
1 Gb
128 M X 8
16
2
14/10
8
8K
4 GB
2 Gb
256 M X 8
16
2
15/10
8
8K
4 GB
4 Gb
512 M X 8
8
1
15/10
8
8K
8 GB
4 Gb
512 M X 8
16
2
16/10
8
8K
Server and Workstation Platforms
Unbuffered / ECC Supported DIMM Module Configurations
D
1 GB
1 Gb
128 M X 8
9
1
14/10
8
8K
2 GB
2 Gb
256 M X 8
9
1
15/10
8
8K
E
2 GB
1 Gb
128 M X 8
18
2
14/10
8
8K
4 GB
2 Gb
256 M X 8
18
2
15/10
8
8K
8 GB
4 Gb
512 M X 8
18
2
16/10
8
8K
Note:
DIMM module support is based on availability and is subject to change.
Note:
System memory configurations are based on availability and are subject to change.
2.1.2
System Memory Timing Support
The IMC supports the following DDR3L Speed Bin, CAS Write Latency (CWL), and
command signal mode timings on the main memory interface:
•
•
tCL = CAS Latency
•
tRCD = Activate Command to READ or WRITE Command delay
•
tRP = PRECHARGE Command Period
•
CWL = CAS Write Latency
•
Command Signal modes = 1N indicates a new command may be issued every
clock and 2N indicates a new command may be issued every 2 clocks. Command
launch mode programming depends on the transfer rate and memory
configuration.
2.1.3
System Memory Organization Modes
The Integrated Memory Controller (IMC) supports two memory organization modes –
single-channel and dual-channel. Depending upon how the DIMM Modules are
populated in each memory channel, a number of different configurations can exist.
Single-Channel Mode
In this mode, all memory cycles are directed to a single-channel. Single-channel mode
is used when either Channel A or Channel B DIMM connectors are populated in any
order, but not both.
Interfaces—Processor
Intel
®
Xeon
®
Processor E3-1200 v3 Product Family
June 2013
Datasheet – Volume 1 of 2
Order No.: 328907-001
19