Справочник Пользователя для Dataram DTM68300A
DTM68300A
32GB - 288-Pin 4Rx4 Load Reduced ECC DDR4 LRDIMM
Document 06361, Revision A, 18-Sep-14, Dataram Corporation
© 2014
Page 2
Speed Bin Table
Speed Bin
DDR4‐2133P
DDR4‐2133R
Unit
NOTE
CL‐nRCD‐nRP
15‐15‐15
16‐16‐16
Parameter
Symbol
min
max
min
max
Internal read command to first data tAA
14.06
10
(13.50)
5,8
18.00
15.00
18.00
ns
Internal read command to first data
with read DBI enabled
with read DBI enabled
tAA_DBI
TBD
TBD
TBD
TBD
ns
ACT to internal read or write delay
time
time
tRCD
14.06
(13.50)
5,8
‐
15.00
‐
ns
PRE command period
tRP
14.06
(13.50)
5,8
‐
15.00
‐
ns
ACT to PRE command period
tRAS
33
9 x
tREFI
33
9 x
tREFI
ns
ACT to ACT or REF command period
tRC
47.06
(46.50)
5,8
‐
48.00
‐
ns
Normal
Read DBI
CWL = 9
CL = 9
CL = 11
(Optional)
5
tCK
(AVG)
1.5
1.6
Reserved
ns
1,2,3,4,7,10
tCK
(AVG)
(Optional)
5,8
CL = 10
CL = 12
tCK
(AVG)
Reserved
1.5
1.6
ns
1,2,3,7
CWL = 9,11
CL = 11
CL = 13
tCK
(AVG)
1.25
<1.5
Reserved
ns
1,2,3,4 ,6
tCK
(AVG)
(Optional)
5,8
CL = 12
CL = 14
tCK
(AVG)
1.25
<1.5
1.25
<1.5
ns
1,2,3,6
CWL =
10,12
CL = 13
CL = 15
tCK
(AVG)
1.071
<1.25
Reserved
ns
1,2,3,4 ,6
tCK
(AVG)
(Optional)
5,8
CL = 14
CL = 16
tCK
(AVG)
1.071
<1.25
1.071
<1.25
ns
1,2,3,6
CWL =
11,14
CL = 14
CL = TBD
tCK
(AVG)
Reserved
Reserved
ns
1,2,3,4
CL = 15
CL = TBD
tCK
(AVG)
0.938
<1.071
Reserved
ns
1,2,3,4
CL = 16
CL = TBD
tCK
(AVG)
0.938
<1.071
0.938
<1.071
ns
1,2,3
Supported CL Settings
(9),(11),12,(13),14,15
, 16
10,12,14,16
nCK
9,10
Supported CL Settings with read DBI
TBD
TBD
nCK
Supported CWL Settings
9,10,11,12,14
9,10,11,12,14
nCK