Техническая Спецификация для Intel Quad-core Intel Xeon DP L5335 Active BX80563L5335A

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Quad-Core Intel® Xeon® Processor 5300 Series Datasheet

• LGA771 socket – The Quad-Core Intel® Xeon® Processor 5300 Series interfaces 

to the baseboard through this surface mount, 771 Land socket. See the LGA771 
Socket Design Guidelines for details regarding this socket.

• Processor core – Processor core with integrated L1 cache. L2 cache and system 

bus interface are shared between the two cores on the die. All AC timing and signal 
integrity specifications are at the pads of the processor die.

• FSB (Front Side Bus) – The electrical interface that connects the processor to the 

chipset. Also referred to as the processor system bus or the system bus. All 
memory and I/O transactions as well as interrupt messages pass between the 
processor and chipset over the FSB.

• Dual Independent Bus (DIB) – A front side bus architecture with one processor 

on each bus, rather than a FSB shared between two processor agents. The DIB 
architecture provides improved performance by allowing increased FSB speeds and 
bandwidth.

• Flexible Motherboard Guidelines (FMB) – Are estimates of the maximum 

values the Quad-Core Intel® Xeon® Processor 5300 Series will have over certain 
time periods. The values are only estimates and actual specifications for future 
processors may differ.

• Functional Operation – Refers to the normal operating conditions in which all 

processor specifications, including DC, AC, FSB, signal quality, mechanical and 
thermal are satisfied.

• Storage Conditions – Refers to a non-operational state. The processor may be 

installed in a platform, in a tray, or loose. Processors may be sealed in packaging or 
exposed to free air. Under these conditions, processor lands should not be 
connected to any supply voltages, have any I/Os biased or receive any clocks. 
Upon exposure to “free air” (that is, unsealed packaging or a device removed from 
packaging material) the processor must be handled in accordance with moisture 
sensitivity labeling (MSL) as indicated on the packaging material.

• Priority Agent – The priority agent is the host bridge to the processor and is 

typically known as the chipset.

• Symmetric Agent – A symmetric agent is a processor which shares the same I/O 

subsystem and memory array, and runs the same operating system as another 
processor in a system. Systems using symmetric agents are known as Symmetric 
Multiprocessing (SMP) systems. 

• Integrated Heat Spreader (IHS) – A component of the processor package used 

to enhance the thermal performance of the package. Component thermal solutions 
interface with the processor at the IHS surface.

• Thermal Design Power – Processor thermal solutions should be designed to meet 

this target. It is the highest expected sustainable power while running known 
power intensive real applications. TDP is not the maximum power that the 
processor can dissipate.

• Intel® 64 Architecture – Instruction set architecture and programming 

environment of Intel’s 64-bit processors, which are a superset of and compatible 
with IA-32. This 64-bit instruction set architecture was formerly known as IA-32 
with EM64T or Intel® EM64T.

• Enhanced Intel SpeedStep® Technology – Technology that provides power 

management capabilities to servers and workstations.

• Platform Environment Control Interface (PECI) – A proprietary one-wire bus 

interface that provides a communication channel between Intel processor and 
chipset components to external thermal monitoring devices, for use in fan speed 
control. PECI communicates readings from the processor’s Digital Thermal Sensor 
(DTS). The replaces the thermal diode available in previous processors.