Техническая Спецификация для Microchip Technology MCP6N11T-001E/MNY Linear IC TDFN-8 MCP6N11T-001E/MNY
Модели
MCP6N11T-001E/MNY
MCP6N11
DS25073A-page 28
© 2011 Microchip Technology Inc.
4.1.3
DC ERRORS
defines some of the DC error specifications. These
errors are internal to the INA, and can be summarized
as follows:
errors are internal to the INA, and can be summarized
as follows:
EQUATION 4-5:
The non-linearity specs (INL
CM
and INL
DM
) describe
errors that are non-linear functions of V
CM
and V
DM
,
respectively. They give the maximum excursion from
linear response over the entire common mode and
differential ranges.
The input bias current and offset current specs (I
linear response over the entire common mode and
differential ranges.
The input bias current and offset current specs (I
B
and
I
OS
), together with a circuit’s external input resistances,
shows the
resistors that set the DC bias point.
FIGURE 4-3:
DC Bias Resistors.
The resistors at the main input (R
IP
and R
IM
) and its
input bias currents (I
BP
and I
BM
) give the following
changes in the INA’s bias voltages:
EQUATION 4-6:
The best design results when R
IP
and R
IM
are equal
and small:
EQUATION 4-7:
The resistors at the feedback input (R
R
, R
F
and R
G
)
and its input bias currents (I
BR
and I
BF
) give the
following changes in the INA’s bias voltages:
EQUATION 4-8:
The best design results when G
DM
R
R
and R
F
are equal
and small:
EQUATION 4-9:
Where:
V
OUT
V
REF
G
DM
1
g
E
+
(
) V
DM
Δ
V
ED
+
(
)
+
=
G
DM
1
g
E
+
(
) V
E
Δ
V
E
+
(
)
+
Where:
PSRR
, CMRR and A
OL
are in units of V/V
Δ
T
A
is in units of °C
V
E
V
OS
Δ
V
DD
Δ
V
SS
–
PSRR
---------------------------------
Δ
V
C M
CMRR
-----------------
Δ
V
RE F
CMRR
-----------------
+
+
+
=
Δ
V
OUT
A
OL
-----------------
Δ
T
A
Δ
V
OS
Δ
T
A
-------------
⋅
+
+
Δ
V
ED
INL
DM
V
DMH
V
DML
–
(
)
≤
Δ
V
E
INL
CM
V
IVH
V
IVL
–
(
)
≤
V
OUT
V
IP
V
DD
V
IM
V
REF
R
F
R
G
R
IP
R
IM
R
R
I
BP
I
BM
V
FG
I
BF
I
BR
U
1
MCP6N11
Where:
CMRR is in units of V/V
Δ
V
IP
I
BP
R
IP
–
I
B
–
I
OS
2
--------
–
⎝
⎠
⎛
⎞
R
IP
=
=
Δ
V
IM
I
BM
R
IM
–
I
B
–
I
OS
2
--------
+
⎝
⎠
⎛
⎞
R
IM
=
=
Δ
V
CM
Δ
V
IP
Δ
V
IM
+
2
---------------------------------
=
I
–
B
R
IP
R
IM
+
2
-------------------------
⎝
⎠
⎛
⎞
I
–
OS
2
-----------
R
–
IP
R
IM
+
2
----------------------------
⎝
⎠
⎛
⎞
+
=
Δ
V
DM
Δ
V
IP
Δ
V
IM
–
=
I
B
R
–
IP
R
IM
+
(
)
I
OS
2
-------- R
IP
R
IM
+
(
)
–
=
Δ
V
OUT
G
DM
Δ
V
DM
Δ
V
C M
CMRR
-----------------
+
⎝
⎠
⎛
⎞
=
Where:
R
IP
= R
IM
ε
RTOL
= tolerance of R
IP
and R
IM
Δ
V
OUT
G
DM
Δ
V
DM
≈
G
DM
2I
B
ε
RTOL
I
OS
–
±
(
)R
IP
≈
Where:
I
B2
meets the I
B
spec, but is not equal to I
B
I
OS2
meets the I
OS
spec, but is not equal to I
OS
ΔV
REF
I
BR
R
R
–
I
B 2
–
I
OS2
2
----------
–
⎝
⎠
⎛
⎞
R
R
=
=
ΔV
FG
ΔV
REF
,
≈
ΔV
OUT
I
B2
R
F
G
DM
R
R
–
(
)
I
OS2
2
---------- R
F
G
DM
R
R
+
(
)
+
≈
due to high A
OL
Where:
G
DM
R
R
= R
F
ε
RTOL
= tolerance of R
R
, R
F
and R
G
ΔV
OUT
2I
B2
ε
RTOL
I
OS2
+
(
)
±
(
)R
F
≈