Техническая Спецификация для Microchip Technology 25AA02E48T-I/OT Memory IC SOT-23-6 2 K 256 x 8 25AA02E48T-I/OT
Модели
25AA02E48T-I/OT
2008-2013 Microchip Technology Inc.
DS20002123D-page 7
25AA02E48/25AA02E64
BLOCK DIAGRAM
FIGURE 2-1:
READ SEQUENCE
SI
SO
SCK
CS
HOLD
WP
STATUS
Register
I/O Control
Memory
Control
Logic
X
Dec
HV Generator
EEPROM
Array
Page Latches
Y Decoder
Sense Amp.
R/W Control
R/W Control
Logic
V
CC
V
SS
TABLE 2-1:
INSTRUCTION SET
Instruction Name
Instruction Format
Description
READ
0000 x011
Read data from memory array beginning at selected address
WRITE
0000 x010
Write data to memory array beginning at selected address
WRDI
0000 x100
Reset the write enable latch (disable write operations)
WREN
0000 x110
Set the write enable latch (enable write operations)
RDSR
0000 x101
Read STATUS register
WRSR
0000 x001
Write STATUS register
x = don’t care
SO
SI
SCK
CS
0
2
3
4
5
6
7
8
9 10 11
1
0
1
0
0
0
0
0
1
A
7
A
6
A
5
A
4
A
1
A
0
7
6
5
4
3
2
1
0
Data Out
High-Impedance
A
3
A
2
Address Byte
12 13 14 15 16 17 18 19 20 21 22 23
Instruction