Техническая Спецификация для Infineon Technologies IC MCU 25 SAK-C167SR-LM HA+ MQFP-144 INF SAK-C167SR-LM HA+
Модели
SAK-C167SR-LM HA+
C167CR
C167SR
Functional Description
Data Sheet
40
V3.3, 2005-02
Figure 7
Block Diagram of GPT1
With its maximum resolution of 8 TCL, the GPT2 module provides precise event control
and time measurement. It includes two timers (T5, T6) and a capture/reload register
(CAPREL). Both timers can be clocked with an input clock which is derived from the CPU
clock via a programmable prescaler or with external signals. The count direction
(up/down) for each timer is programmable by software or may additionally be altered
dynamically by an external signal on a port pin (TxEUD). Concatenation of the timers is
supported via the output toggle latch (T6OTL) of timer T6, which changes its state on
each timer overflow/underflow.
The state of this latch may be used to clock timer T5, and/or it may be output on pin
T6OUT. The overflows/underflows of timer T6 can additionally be used to clock the
CAPCOM timers T0 or T1, and to cause a reload from the CAPREL register. The
CAPREL register may capture the contents of timer T5 based on an external signal
transition on the corresponding port pin (CAPIN), and timer T5 may optionally be cleared
after the capture procedure. This allows the C167CR to measure absolute time
differences or to perform pulse multiplication without software overhead.
and time measurement. It includes two timers (T5, T6) and a capture/reload register
(CAPREL). Both timers can be clocked with an input clock which is derived from the CPU
clock via a programmable prescaler or with external signals. The count direction
(up/down) for each timer is programmable by software or may additionally be altered
dynamically by an external signal on a port pin (TxEUD). Concatenation of the timers is
supported via the output toggle latch (T6OTL) of timer T6, which changes its state on
each timer overflow/underflow.
The state of this latch may be used to clock timer T5, and/or it may be output on pin
T6OUT. The overflows/underflows of timer T6 can additionally be used to clock the
CAPCOM timers T0 or T1, and to cause a reload from the CAPREL register. The
CAPREL register may capture the contents of timer T5 based on an external signal
transition on the corresponding port pin (CAPIN), and timer T5 may optionally be cleared
after the capture procedure. This allows the C167CR to measure absolute time
differences or to perform pulse multiplication without software overhead.
T3
Mode
Control
2
n
: 1
f
CPU
2
n
: 1
f
CPU
T2
Mode
Control
GPT1 Timer T2
Reload
Capture
2
n
: 1
f
CPU
T4
Mode
Control
GPT1 Timer T4
Reload
Capture
GPT1 Timer T3
T3OTL
U/D
T2EUD
T2IN
T3IN
T3EUD
T4IN
T4EUD
T3OUT
Toggle FF
U/D
U/D
Interrupt
Request
Request
Interrupt
Request
Request
Interrupt
Request
Request
Other
Timers
Timers
MCT02141
n = 3 … 10