Техническая Спецификация для Texas Instruments THS4271 Evaluation Module THS4271EVM THS4271EVM
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Модели
THS4271EVM
Inverting Gain Stage
3-3
EVM Applications
3.3
Inverting Gain Stage
If unity gain inverting operation is desired, the user should:
-
Change R6 to 0
Ω
-
Remove R7
-
Change R4 to 0
Ω
-
Change R2 to 61.9
Ω
(R3 in parallel with R2 equals 50
Ω
for termination
of the input)
as shown in Figure 3-3.
Figure 3-3. Inverting Gain Stage
R6
0
R2
R5
J4
Vout
J1
Vin-
Vs-
-
+
U1
2
3
6
7
4
R3
Vs+
R4
0
0
249
249
61.9
The gain for this circuit with a 50-
Ω
source is:
V
O
V
I
+ *
R5
R3
R3
when the input voltage is measured at J1.
The input impedance of the stage is 50
Ω
, as determined by R2 in parallel with
R3.
3.4
Power-Down Reference Operation—THS4275EVM Only
For the default EVM configuration, power-down reference level is set to
ground through R1. This reference can be set to a different level if R1 is
removed and an external voltage is supplied to J8 as shown in Figure 3-4.
ground through R1. This reference can be set to a different level if R1 is
removed and an external voltage is supplied to J8 as shown in Figure 3-4.