Техническая Спецификация для Texas Instruments TLV320AIC3111 Evaluation Module TLV320AIC3111EVM-K TLV320AIC3111EVM-K

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2
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A
B
C
D
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5
4
3
2
1
D
C
B
A
ti
12500 T.I. Boulevard, Dallas, Texas 75243 USA
TITLE
SHEET
OF
FILE
SIZE
DATE
REV
16-Mar-2009
DRAWN BY
ENGINEER
REVISION HISTORY
REV
ENGINEERING CHANGE NUMBER
APPROVED
B
DATA ACQUISITION PRODUCTS
HIGH-PERFORMANCE ANALOG DIVISION
SEMICONDUCTOR GROUP
Mike Tsecouras
Steve Leggio
A
2
3
AIC3111_RHB_EVM
DOCUMENT CONTROL NO.N/A
GPIO0
2
DGND
4
GPIO1
6
GPIO2
8
DGND
10
GPIO3
12
GPIO4
14
SCL
16
DGND
18
SDA
20
CNTL
1
CLKX
3
CLKR
5
FSX
7
FSR
9
DX
11
DR
13
INT
15
TOUT
17
GPIO5
19
J4
DAUGHTER-SERIAL
A0(+)
2
A1(+)
4
A2(+)
6
A3(+)
8
A4
10
A5
12
A6
14
A7
16
REF-
18
REF+
20
A0(-)
1
A1(-)
3
A2(-)
5
A3(-)
7
AGND
9
AGND
11
AGND
13
VCOM
15
AGND
17
AGND
19
J1
DAUGHTER-ANALOG
-VA
2
-5VA
4
AGND
6
VD1
8
+5VD
10
+VA
1
+5VA
3
DGND
5
+1.8VD
7
+3.3VD
9
J3
DAUGHTER-POWER
GPIO0
2
DGND
4
GPIO1
6
GPIO2
8
DGND
10
GPIO3
12
GPIO4
14
SCL
16
DGND
18
SDA
20
CNTL
1
CLKX
3
CLKR
5
FSX
7
FSR
9
DX
11
DR
13
INT
15
TOUT
17
GPIO5
19
J5
DAUGHTER-SERIAL
A0(+)
2
A1(+)
4
A2(+)
6
A3(+)
8
A4
10
A5
12
A6
14
A7
16
REF-
18
REF+
20
A0(-)
1
A1(-)
3
A2(-)
5
A3(-)
7
AGND
9
AGND
11
AGND
13
VCOM
15
AGND
17
AGND
19
J2
DAUGHTER-ANALOG
MCLK
BCLK
WCLK
SDIN
SDOUT
/RESET
SDA
SCL
J1 (BOTTOM) = SSW-110-22-F-D-VS-K 
P4 (TOP) = TSM-110-01-L-DV-P
J4 (BOTTOM) = SSW-110-22-F-D-VS-K 
J2 (BOTTOM) = SSW-110-22-F-D-VS-K 
P5 (TOP) = TSM-110-01-L-DV-P
J5 (BOTTOM) = SSW-110-22-F-D-VS-K 
P3 (TOP) = TSM-105-01-L-DV-P
J3 (BOTTOM) = SSW-105-22-F-D-VS-K 
+1.8VD
+3.3VD
+5VA
TP3
HVSS
+3.3VA
C1
10uF
R2
100K
R3
100K
C2
10uF
1GND
3
1EN
4
1IN
5
1IN
6
2GND
9
2EN
10
2IN
11
2IN
12
2OUT
17
2OUT
18
2RESET
22
1OUT
23
1OUT
24
1RESET
28
1FB
25
U4
TPS767D301PWP
R5
56K
R6
30.1K
+3.9VA
+5VA
TP7
+5VA
TP10
+3.3VA
TP11
+3.9VA
R1
20K
TP8
+1.8VD
TP9
+3.3VD
TP2
SVSS
TP4
DGND
TP1
AVSS
TP5
DGND
TP6
DGND
P3/
P4/
P5/
VCC
8
VSS
4
SDA
5
SCL
6
A0
1
A1
2
A2
3
WP
7
U5
MICROCHIP_24AA64
C4
0.1uF
+3.3VD
R7
2.7K
1
2
W20
R8
2.7K
R9
2.7K
+3.3VD
C12
47uF
C13
47uF