Техническая Спецификация для Texas Instruments LV32EVK01 Evaluation Kit LV32EVK01/NOPB LV32EVK01/NOPB
Модели
LV32EVK01/NOPB
DS92LV3241/3242 Evaluation Kit Users Manual Version 1.0
Introduction:
National Semiconductor’s SERDES evaluation kit contains one (1) DS92LV3241
Serializer (Tx) board, one (1) DS92LV3242 Deserializer (Rx) board, and one (1)
standard (~2) meter CAT 6 style cable assembly.
Serializer (Tx) board, one (1) DS92LV3242 Deserializer (Rx) board, and one (1)
standard (~2) meter CAT 6 style cable assembly.
Note: The demo boards are not intended for EMI testing. These demo boards were
designed for easy accessibility to device pins with tap points for monitoring or applying
signals, and additional pads for termination.
The DS92LV3241/3242 chipset supports a variety of display and imaging applications.
Typical applications include: navigation displays, automated teller machines (ATMs),
POS, video cameras, global positioning systems (GPS), portable
equipment/instruments, factory automation, printers, etc.
designed for easy accessibility to device pins with tap points for monitoring or applying
signals, and additional pads for termination.
The DS92LV3241/3242 chipset supports a variety of display and imaging applications.
Typical applications include: navigation displays, automated teller machines (ATMs),
POS, video cameras, global positioning systems (GPS), portable
equipment/instruments, factory automation, printers, etc.
The DS92LV3241 and DS92LV3242 can also be used as a 32-bit general purpose
LVDS Serializer and Deserializer chipset designed to transmit data at clocks speeds
ranging from 20 to 50 MHz in dual mode or 40MHz to 85 MHz in quad mode.
The DS92LV3241 serializer board accepts LVCMOS input signals at either 3.3V or
1.8V.
Note: IOV
DD
must be set to 3.3V for 3.3V input levels or 1.8V for 1.8V input levels.
The LVDS Serializer converts the LVCMOS parallel lines into either two (2) serialized
LVDS data pairs with an embedded LVDS clock on each channel or four (4) serialized
LVDS data pairs with an embedded LVDS clock on each channel.
The DS92LV3242 deserializer board accepts the LVDS serialized data streams with an
embedded clock on each LVDS stream and converts the data back into parallel
LVCMOS signals and clock. Note that NO reference clock is needed to prevent
harmonic lock as with other devices currently on the market.
Suggested equipment to evaluate the chipset include: an LVCMOS signal source, such
as a video generator, word generator, or pulse generator and oscilloscope.
The user needs to provide the proper LVCMOS clock and data inputs to the serializer
and also provide a proper interface from the deserializer output to an LCD panel or test
equipment. The serializer and deserializer boards can also be used to evaluate device
parameters.
National Semiconductor Corporation
Date: 9/28/2009
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