Техническая Спецификация для Microchip Technology ADM00375

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 2010-2011 Microchip Technology Inc.
DS22243D-page 17
MCP6H01/2/4
4.0
APPLICATION INFORMATION
The MCP6H01/2/4 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process and
is specifically designed for low-power, high-precision
applications.
4.1
Inputs
4.1.1
PHASE REVERSAL
The MCP6H01/2/4 op amps are designed to prevent
phase reversal when the input pins exceed the supply
voltages. 
 shows the input voltage
exceeding the supply voltage without any phase
reversal.
4.1.2
INPUT VOLTAGE LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the voltages at
the input pins (see 
The ESD protection on the inputs can be depicted as
shown in 
. This structure was chosen to
protect the input transistors against many (but not all)
over-voltage conditions, and to minimize the input bias
current (I
B
).
FIGURE 4-1:
Simplified Analog Input ESD 
Structures.
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below V
SS
. They also
clamp any voltages that go well above V
DD
. Their
breakdown voltage is high enough to allow normal
operation, but not low enough to protect against slow
overvoltage (beyond V
DD
) events. Very fast ESD
events (that meet the specification) are limited so that
damage does not occur.
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs;
 shows one approach to protecting these
inputs.
FIGURE 4-2:
Protecting the Analog 
Inputs.
A significant amount of current can flow out of the
inputs when the common mode voltage (V
CM
) is below
ground (V
SS
), se
.
4.1.3
INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the currents
into the input pins (see 
). 
 shows one approach to protecting these
inputs. The resistors R
1
 and R
2
 limit the possible
currents in or out of the input pins (and the ESD diodes,
D
1
 and D
2
). The diode currents will go through either
V
DD
 or V
SS
.
FIGURE 4-3:
Protecting the Analog 
Inputs.
4.1.4
NORMAL OPERATION
The inputs of the MCP6H01/2/4 op amps connect to a
differential PMOS input stage. It operates at a low
common mode input voltage (V
CM
), including ground.
With this topology, the device operates with a V
CM
 up
to V
DD
– 2.3V and 0.3V below V
SS
 (refer to 
through 
). The input offset voltage is measured at
V
CM
= V
SS
– 0.3V and V
DD
– 2.3V to ensure proper
operation.
Bond
Pad
Bond
Pad
Bond
Pad
V
DD
V
IN
+
V
SS
Input
Stage
Bond
Pad
V
IN
V
1
V
DD
D
1
V
2
D
2
MCP6H0X
V
OUT
V
1
R
1
V
DD
D
1
R
1
>
V
SS
– (minimum expected V
1
)
2 mA
R
2
>
V
SS
– (minimum expected V
2
)
2 mA
V
2
R
2
D
2
R
3
V
OUT
MCP6H0X