Техническая Спецификация для Microchip Technology MA240017
PIC24F16KA102 FAMILY
DS39927C-page 272
2008-2011 Microchip Technology Inc.
D
Data EEPROM
Bulk Erase .................................................................. 55
Erasing ....................................................................... 54
Operations ................................................................. 53
Programming
Erasing ....................................................................... 54
Operations ................................................................. 53
Programming
Reading Data EEPROM .................................... 56
Single-Word Write .............................................. 55
Single-Word Write .............................................. 55
Data Memory
Address Space ........................................................... 31
Memory Map .............................................................. 31
Near Data Space ....................................................... 32
Organization, Alignment ............................................. 32
SFR Space ................................................................. 32
Software Stack ........................................................... 41
Space Width ............................................................... 31
Memory Map .............................................................. 31
Near Data Space ....................................................... 32
Organization, Alignment ............................................. 32
SFR Space ................................................................. 32
Software Stack ........................................................... 41
Space Width ............................................................... 31
DC Characteristics
Brown-out Reset Trip Points .................................... 219
Comparator Specifications ....................................... 230
Comparator Voltage Reference Specifications ........ 230
CTMU Current Source Specifications ...................... 230
Data EEPROM Memory ........................................... 229
High/Low-Voltage Detect ......................................... 218
I/O Pin Input Specifications ...................................... 227
I/O Pin Output Specifications ................................... 228
Idle Current I
Comparator Specifications ....................................... 230
Comparator Voltage Reference Specifications ........ 230
CTMU Current Source Specifications ...................... 230
Data EEPROM Memory ........................................... 229
High/Low-Voltage Detect ......................................... 218
I/O Pin Input Specifications ...................................... 227
I/O Pin Output Specifications ................................... 228
Idle Current I
IDLE
Internal Voltage References .................................... 230
Operating Current I
Operating Current I
Power-Down Current I
PD
Program Memory ..................................................... 229
Temperature and Voltage Specifications ................. 218
Thermal Operating Conditions ................................. 217
Thermal Packaging Characteristics ......................... 217
Temperature and Voltage Specifications ................. 218
Thermal Operating Conditions ................................. 217
Thermal Packaging Characteristics ......................... 217
Deep Sleep
Checking, Clearing Status ....................................... 104
Entering .................................................................... 102
Entering .................................................................... 102
Exiting ...................................................................... 103
I/O Pins .................................................................... 103
POR ......................................................................... 104
Sequence Summary ................................................ 104
WDT ......................................................................... 104
I/O Pins .................................................................... 103
POR ......................................................................... 104
Sequence Summary ................................................ 104
WDT ......................................................................... 104
Deep Sleep BOR (DSBOR) ............................................... 61
Development Support ...................................................... 203
Device Features (Summary) .............................................. 11
Doze Mode ....................................................................... 107
Development Support ...................................................... 203
Device Features (Summary) .............................................. 11
Doze Mode ....................................................................... 107
E
Electrical Characteristics
Absolute Maximum Ratings ..................................... 215
V/F Graphs (Industrial, Extended) ........................... 216
V/F Graphs (Industrial) ............................................. 216
V/F Graphs (Industrial, Extended) ........................... 216
V/F Graphs (Industrial) ............................................. 216
Equations
A/D Conversion Clock Period .................................. 181
Baud Rate Reload Calculation ................................. 141
Calculating the PWM Period .................................... 126
Calculation for Maximum PWM Resolution .............. 126
CRC ......................................................................... 167
Device and SPI Clock Speed Relationship .............. 138
UART Baud Rate with BRGH = 0 ............................ 148
UART Baud Rate with BRGH = 1 ............................ 148
Baud Rate Reload Calculation ................................. 141
Calculating the PWM Period .................................... 126
Calculation for Maximum PWM Resolution .............. 126
CRC ......................................................................... 167
Device and SPI Clock Speed Relationship .............. 138
UART Baud Rate with BRGH = 0 ............................ 148
UART Baud Rate with BRGH = 1 ............................ 148
Examples
Baud Rate Error Calculation (BRG) ......................... 148
PWM Frequencies, Resolutions at 16 MIPS ............ 127
PWM Frequencies, Resolutions at 4 MIPS .............. 127
PWM Period, Duty Cycle Calculations ..................... 127
PWM Frequencies, Resolutions at 16 MIPS ............ 127
PWM Frequencies, Resolutions at 4 MIPS .............. 127
PWM Period, Duty Cycle Calculations ..................... 127
F
Flash and Data EEPROM
Programming
Flash and Data EEPROM Programming
Control Registers
Flash Program Memory
Control Registers ....................................................... 46
Enhanced ICSP Operation ........................................ 46
Programming Algorithm ............................................. 48
Programming Operations ........................................... 46
RTSP Operation ........................................................ 46
Table Instructions ...................................................... 45
Enhanced ICSP Operation ........................................ 46
Programming Algorithm ............................................. 48
Programming Operations ........................................... 46
RTSP Operation ........................................................ 46
Table Instructions ...................................................... 45
H
I
I/O Ports
Analog Pins Configuration ....................................... 114
Input Change Notification ........................................ 114
Open-Drain Configuration ........................................ 114
Parallel (PIO) ........................................................... 113
Input Change Notification ........................................ 114
Open-Drain Configuration ........................................ 114
Parallel (PIO) ........................................................... 113
I
2
C
Clock Rates ............................................................. 141
Communicating as Master in Single Master
Communicating as Master in Single Master
Pin Remapping Options ........................................... 139
Reserved Addresses ............................................... 141
Slave Address Masking ........................................... 141
Reserved Addresses ............................................... 141
Slave Address Masking ........................................... 141
In-Circuit Debugger .......................................................... 202
In-Circuit Serial Programming (ICSP) .............................. 202
Input Capture ................................................................... 123
Instruction Set
In-Circuit Serial Programming (ICSP) .............................. 202
Input Capture ................................................................... 123
Instruction Set
Opcode Symbols ..................................................... 208
Overview .................................................................. 209
Summary ................................................................. 207
Overview .................................................................. 209
Summary ................................................................. 207
2
C.
Alternate Interrupt Vector Table (AIVT) ..................... 63
Control and Status Registers ..................................... 66
Implemented Vectors ................................................. 65
Interrupt Service Routine (ISR) .................................. 90
Interrupt Vector Table (IVT) ....................................... 63
Reset Sequence ........................................................ 63
Setup and Service Procedures .................................. 90
Trap Service Routine (TSR) ...................................... 90
Trap Vectors .............................................................. 65
Vector Table .............................................................. 64
Control and Status Registers ..................................... 66
Implemented Vectors ................................................. 65
Interrupt Service Routine (ISR) .................................. 90
Interrupt Vector Table (IVT) ....................................... 63
Reset Sequence ........................................................ 63
Setup and Service Procedures .................................. 90
Trap Service Routine (TSR) ...................................... 90
Trap Vectors .............................................................. 65
Vector Table .............................................................. 64