Техническая Спецификация для Microchip Technology MA330031-2
2011-2013 Microchip Technology Inc.
DS70000657H-page 279
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
bit 3
S:
Start bit
1
= Indicates that a Start (or Repeated Start) bit has been detected last
0
= Start bit was not detected last
Hardware is set or clear when a Start, Repeated Start or Stop is detected.
bit 2
R_W:
Read/Write Information bit (when operating as I
2
C slave)
1
= Read – Indicates data transfer is output from the slave
0
= Write – Indicates data transfer is input to the slave
Hardware is set or clear after reception of an I
2
C device address byte.
bit 1
RBF:
Receive Buffer Full Status bit
1
= Receive is complete, I2CxRCV is full
0
= Receive is not complete, I2CxRCV is empty
Hardware is set when I2CxRCV is written with a received byte. Hardware is clear when software reads
I2CxRCV.
I2CxRCV.
bit 0
TBF:
Transmit Buffer Full Status bit
1
= Transmit in progress, I2CxTRN is full
0
= Transmit is complete, I2CxTRN is empty
Hardware is set when software writes to I2CxTRN. Hardware is clear at completion of a data transmission.
REGISTER 19-2:
I2CxSTAT: I2Cx STATUS REGISTER (CONTINUED)