Техническая Спецификация для Microchip Technology MA330031-2
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dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 344
2011-2013 Microchip Technology Inc.
bit 4
OC1CS:
Clock Source for OC1 bit
1
= Generates clock pulse when the broadcast command is executed
0
= Does not generate clock pulse when the broadcast command is executed
bit 3
OC4TSS:
Trigger/Synchronization Source for OC4 bit
1
= Generates Trigger/Synchronization when the broadcast command is executed
0
= Does not generate Trigger/Synchronization when the broadcast command is executed
bit 2
OC3TSS:
Trigger/Synchronization Source for OC3 bit
1
= Generates Trigger/Synchronization when the broadcast command is executed
0
= Does not generate Trigger/Synchronization when the broadcast command is executed
bit 1
OC2TSS:
Trigger/Synchronization Source for OC2 bit
1
= Generates Trigger/Synchronization when the broadcast command is executed
0
= Does not generate Trigger/Synchronization when the broadcast command is executed
bit 0
OC1TSS:
Trigger/Synchronization Source for OC1 bit
1
= Generates Trigger/Synchronization when the broadcast command is executed
0
= Does not generate Trigger/Synchronization when the broadcast command is executed
REGISTER 24-3:
PTGBTE: PTG BROADCAST TRIGGER ENABLE REGISTER
(
1
,
2
)
(CONTINUED)
Note 1:
This register is read-only when the PTG module is executing Step commands (PTGEN = 1 and
PTGSTRT = 1).
PTGSTRT = 1).
2:
This register is only used with the PTGCTRL OPTION = 1111 Step command.