Техническая Спецификация для Microchip Technology MA330031-2
2011-2013 Microchip Technology Inc.
DS70000657H-page 125
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
REGISTER 6-1:
RCON: RESET CONTROL REGISTER
)
R/W-0
R/W-0
U-0
U-0
R/W-0
U-0
R/W-0
R/W-0
TRAPR
IOPUWR
—
—
VREGSF
—
CM
VREGS
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-1
R/W-1
EXTR
SWR
SWDTEN
WDTO
SLEEP
IDLE
BOR
POR
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
TRAPR:
Trap Reset Flag bit
1
= A Trap Conflict Reset has occurred
0
= A Trap Conflict Reset has not occurred
bit 14
IOPUWR:
Illegal Opcode or Uninitialized W Access Reset Flag bit
1
= An illegal opcode detection, an illegal address mode or Uninitialized W register used as an
Address Pointer caused a Reset
0
= An illegal opcode or Uninitialized W register Reset has not occurred
bit 13-12
Unimplemented:
Read as ‘0’
bit 11
VREGSF:
Flash Voltage Regulator Standby During Sleep bit
1
= Flash voltage regulator is active during Sleep
0
= Flash voltage regulator goes into Standby mode during Sleep
bit 10
Unimplemented:
Read as ‘0’
bit 9
CM:
Configuration Mismatch Flag bit
1
= A Configuration Mismatch Reset has occurred.
0
= A Configuration Mismatch Reset has not occurred
bit 8
VREGS:
Voltage Regulator Standby During Sleep bit
1
= Voltage regulator is active during Sleep
0
= Voltage regulator goes into Standby mode during Sleep
bit 7
EXTR:
External Reset (MCLR) Pin bit
1
= A Master Clear (pin) Reset has occurred
0
= A Master Clear (pin) Reset has not occurred
bit 6
SWR:
Software RESET (Instruction) Flag bit
1
= A RESET instruction has been executed
0
= A RESET instruction has not been executed
bit 5
SWDTEN:
Software Enable/Disable of WDT bit
1
= WDT is enabled
0
= WDT is disabled
bit 4
WDTO:
Watchdog Timer Time-out Flag bit
1
= WDT time-out has occurred
0
= WDT time-out has not occurred
Note 1:
All of the Reset status bits can be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
cause a device Reset.
2:
If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
SWDTEN bit setting.
SWDTEN bit setting.