Техническая Спецификация для Microchip Technology MA330026
2011-2014 Microchip Technology Inc.
DS70000652F-page 187
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
REGISTER 15-4:
PxSECMP: PWMx SPECIAL EVENT COMPARE REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SEVTDIR
(
SEVTCMP<14:8>
)
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SEVTCMP<7:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
SEVTDIR: Special Event Trigger Time Base Direction bit
(
)
1
= A Special Event Trigger will occur when the PWMx time base is counting down
0
= A Special Event Trigger will occur when the PWMx time base is counting up
bit 14-0
SEVTCMP<14:0>: Special Event Compare Value bits
)
Note 1:
SEVTDIR is compared with PTDIR (PxTMR<15>) to generate the Special Event Trigger.
2:
PxSECMP<14:0> is compared with PxTMR<14:0> to generate the Special Event Trigger.