Техническая Спецификация для Microchip Technology MA330026
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dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
DS70000652F-page 214
2011-2014 Microchip Technology Inc.
bit 4
URXINV: UARTx Receive Polarity Inversion bit
1
= UxRX Idle state is ‘0’
0
= UxRX Idle state is ‘1’
bit 3
BRGH: High Baud Rate Enable bit
1
= BRG generates 4 clocks per bit period (4x baud clock, High-Speed mode)
0
= BRG generates 16 clocks per bit period (16x baud clock, Standard mode)
bit 2-1
PDSEL<1:0>: Parity and Data Selection bits
11
= 9-bit data, no parity
10
= 8-bit data, odd parity
01
= 8-bit data, even parity
00
= 8-bit data, no parity
bit 0
STSEL: Stop Bit Selection bit
1
= Two Stop bits
0
= One Stop bit
REGISTER 18-1:
UxMODE: UART
x
MODE REGISTER (CONTINUED)
Note 1:
Refer to “UART” (DS70188) in the “dsPIC33/PIC24 Family Reference Manual” for information on
enabling the UART module for receive or transmit operation.
enabling the UART module for receive or transmit operation.
2:
This feature is available for 16x BRG mode (BRGH = 0) only.