Техническая Спецификация для Microchip Technology MA330026
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
DS70000652F-page 90
2011-2014 Microchip Technology Inc.
6.2
System Reset
The dsPIC33FJ16(GP/MC)101/102 and
dsPIC33FJ32(GP/MC)101/102/104 family of devices
have two types of Reset:
dsPIC33FJ32(GP/MC)101/102/104 family of devices
have two types of Reset:
• Cold Reset
• Warm Reset
A Cold Reset is the result of a POR or a BOR. On a
Cold Reset, the FNOSC<2:0> Configuration bits in the
FOSCSEL Configuration register selects the device
clock source.
Cold Reset, the FNOSC<2:0> Configuration bits in the
FOSCSEL Configuration register selects the device
clock source.
A Warm Reset is the result of all other Reset sources,
including the RESET instruction. On Warm Reset, the
device will continue to operate from the current clock
source as indicated by the Current Oscillator Selec-
tion (COSC<2:0>) bits in the Oscillator Control
(OSCCON<14:12>) register.
including the RESET instruction. On Warm Reset, the
device will continue to operate from the current clock
source as indicated by the Current Oscillator Selec-
tion (COSC<2:0>) bits in the Oscillator Control
(OSCCON<14:12>) register.
The device is kept in a Reset state until the system
power supplies have stabilized at appropriate levels
and the oscillator clock is ready. The sequence in
which this occurs is shown in
power supplies have stabilized at appropriate levels
and the oscillator clock is ready. The sequence in
which this occurs is shown in
TABLE 6-1:
OSCILLATOR DELAY
Oscillator Mode
Oscillator
Start-up Delay
Oscillator Start-up
Timer
PLL Lock Time
Total Delay
FRC, FRCDIV16,
FRCDIVN
FRCDIVN
T
OSCD
(
)
—
—
T
OSCD
FRCPLL
T
OSCD
(
)
—
T
LOCK
(
)
T
OSCD
(
+ T
LOCK
)
MS
T
OSCD
(
)
T
OST
—
T
OSCD
(
)
+ T
OST
HS
T
OSCD
(
)
T
OST
—
T
OSCD
(
)
+ T
OST
EC
—
—
—
—
MSPLL
T
OSCD
(
)
T
OST
T
LOCK
(
)
T
OSCD
+ T
OST
(
)
+ T
LOCK
)
ECPLL
—
—
T
LOCK
(
)
T
LOCK
SOSC
T
OSCD
(
)
T
OST
—
T
OSCD
(
)
+ T
OST
LPRC
T
OSCD
(
)
—
—
T
OSCD
Note 1:
T
OSCD
= Oscillator Start-up Delay (1.1
s max. for FRC, 70 s max. for LPRC). Crystal oscillator start-up
times vary with crystal characteristics, load capacitance, etc.
2:
T
OST
= Oscillator Start-up Timer Delay (1024 oscillator clock period). For example, T
OST
= 102.4
s for a
10 MHz crystal and T
OST
= 32 ms for a 32 kHz crystal.
3:
T
LOCK
= PLL Lock time (1.5 ms nominal) if PLL is enabled.