Техническая Спецификация для Microchip Technology ARD00385
2009-2011 Microchip Technology Inc.
DS39957D-page 177
PIC18F87K90 FAMILY
11.9
PORTH, LATH and
TRISH Registers
TRISH Registers
PORTH is an 8-bit wide, bidirectional I/O port. The
corresponding Data Direction and Output Latch registers
are TRISH and LATH.
All pins on PORTH are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
All PORTH pins are multiplexed with the
ADC/CCP/Comparator and LCD segment drives
controlled by the LCDSE5 register. I/O port functions are
only available when the segments are disabled.
corresponding Data Direction and Output Latch registers
are TRISH and LATH.
All pins on PORTH are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
All PORTH pins are multiplexed with the
ADC/CCP/Comparator and LCD segment drives
controlled by the LCDSE5 register. I/O port functions are
only available when the segments are disabled.
EXAMPLE 11-8:
INITIALIZING PORTH
Note:
PORTH is available only on the 80-pin
devices.
devices.
CLRF
PORTH
; Initialize PORTH by
; clearing output
; data latches
CLRF
LATH
; Alternate method
; to clear output
; data latches
BANKSEL
ANCON2
MOVLW
0Fh
; Configure PORTH as
MOVWF
ANCON2
; digital I/O
MOVLW
0Fh
; Configure PORTH as
MOVWF
ANCON1
; digital I/O
MOVLW
0CFh
; Value used to
; initialize data
; direction
MOVWF
TRISH
; Set RH3:RH0 as inputs
; RH5:RH4 as outputs
; RH7:RH6 as inputs